The AIC111 IC design specification serves to provide product development teams with a guideline for how the AIC111 IC is specified and programmable options that are available. The document outlines a top-level block description of the IC along with system specifications and functions. Individual block descriptions and target specifications are also outlined.

The Texas Instruments AIC111 is a TI µPower DSP compatible, or microcontroller compatible audio codec product, or analog interface circuit. The AIC111 is part of a comprehensive family of DSP/µC based high-performance analog interface solutions. The AIC111 is targeted primarily at personal medical devices, such as hearing instruments, aural preprocessing applications, and low-power headset applications. The AIC111 is used in any design requiring a programmable time constant PGA/compressor interface, high dynamic range analog-to-digital converter, an external DSP/µC handling signal processing, or a low distortion digital-to-analog converter with a balanced H-Bridge speaker driver. It supports a CMOS digital interface tailored for TI DSPs with the McBSP protocol such as TMS320VC54x™ DSP family and SPI-based controllers such as TI MSP430x family of microcontrollers. The AIC111 also has an external microphone or sensor supply and bias and power supply up low-battery monitor indicator.

The AIC111 comes in a 32-pin QFN 5×5-mm package. A 32-pad solder ball bumped flip chip die that comes in waffle packs or tape and reel is in preview and will be available 3rd quarter 2003.

• Single Channel Codec
• Noise Shaped Delta Sigma ADC and DAC Technology
• Low Supply Voltage and Current:
  • 1.3-V Typical Power Supply
  • 350-µA Typical Supply Current Drain
• Power Supply Up Monitor and Low Battery Monitor That Also Automatically Shuts Off H-Bridge Output When Battery Decays Below 1.05 V in a Nontransient Manner
• Typical 2.4-µVrms Input Referred Noise With 0.01% Total Harmonic Distortion for Front End and 108-dB Dynamic Range
• ADC Has 87-dB Dynamic Range With 73-dB Total Harmonic Distortion 100 Hz–10 kHz, 40-kHz Sampling Rate
• Typical 55-dB PSRR 100 Hz to 10 kHz for Analog Front End
• Low Noise Programmable Gain Amplifier/Compressor Front End With Programmable Fast and Slow Attack and Decay Rates With Dual or Single Attack and Decay Rate Option
• Typical Output Noise of 12 µVrms With 0.05% Total Harmonic Distortion for Delta Sigma DAC and H-Bridge Output Driver
• Low Jitter Oscillator That Generates all Internal Clocks and Generates 5-MHz Output DSP/µC Clock
• Regulated Bandgap Voltage Reference
• Programmable Functionality via Digital Serial Interface
  • McBSP Interface, DSP Protocol
  • TI TMS320VC54x™, TMS320VC55x™ DSPs
  • SPI Interface, Microcontroller Protocol
  • TI MSP430xx
• External Chip Power Down and Reset
• Available in:
  • 32-Pin QFN 5×5-mm Plastic Package
  • 32-Pad Bumped Die in Waffle Pack (wafer scale packaging)
• APPLICATIONS
  • Hearing Instruments
  • Personal Medical Devices
  • Hearing Protection
  • Aural Processing
  • Low-Power Headsets