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TI产品 - CD40110B介绍

CD40110B - CMOS 十进制加减计数器/锁存器/显示屏驱动器

CD40110B是TI德州仪器公司的一款计数器/算术/奇偶校验功能产品，CD40110B是CMOS 十进制加减计数器/锁存器/显示屏驱动器，本站介绍了CD40110B的封装应用图解、特点和优点、功能等，并给出了与CD40110B相关的TI元器件型号供参考。

CD40110B - CMOS 十进制加减计数器/锁存器/显示屏驱动器 - 计数器/算术/奇偶校验功能 - 特殊逻辑 - 德州仪器

产品描述

CD40110B is a dual-clocked up/down counter with a special preconditioning circuit that allows the counter to be clocked, via positive going inputs, up or down regardless of the state or timing (within 100 ns typ.) of the other clock line.

The clock signal is fed into the control logic and Johnson counter after it is preconditioned. The outputs of the Johnson counter (which include anti-lock gating to avoid being locked at an illegal state) are fed into a latch. This data can be fed directly to the decoder through the latch or can be strobed to hold a particular count while the Johnson counter continues to be clocked. The decoder feeds a seven-segment bipolar output driver which can source up to 25 mA to drive LEDs and other displays such as low-voltage fluorescent and incandescent lamps.

A short durating negative-going pulse appears on the BORROW output when the count changes from 0 to 9 or the CARRY output when the count changes from 9 to 0. At the other times the BORROW and CARRY outputs are a logic 1.

The CARRY and BORROW outputs can be tied directly to the clock-up and clock-down lines respectively of another CD40110B for easy cascading of several counters.

The CD40110B types are supplied in 16-0lead dual-in-line ceramic packages (D and F suffixes), and 16-lead dual-in-line plastic package (E suffix), and also available in chip form, (H suffix).

产品特性

  • Separate clock-up and clock-down lines
  • Capable of driving common cathode LEDs and other displays directly
  • Allows cascading without any external circuitry
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range) = 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
  • 5 V, 10 V and 15 V parametric ratings
    • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices".
  • Applications
    • Rate comparators
    • General counting applications where display is desired
    • Up-down counting applications where input pulses are random in nature

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