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CD74HC166 - 高速 CMOS 逻辑 8 位并行输入/串行输出移位寄存器
CD74HC166是TI德州仪器公司的一款移位寄存器产品,CD74HC166是高速 CMOS 逻辑 8 位并行输入/串行输出移位寄存器,本站介绍了CD74HC166的封装应用图解、特点和优点、功能等,并给出了与CD74HC166相关的TI元器件型号供参考。
CD74HC166 - 高速 CMOS 逻辑 8 位并行输入/串行输出移位寄存器 - 移位寄存器 - 触发器/锁存器/寄存器 - 德州仪器
The HC166 and HCT166 8-bit shift register is fabricated with silicon gate CMOS technology. It possesses the low power consumption of standard CMOS integrated circuits, and can operate at speeds comparable to the equivalent low power Schottky device.
The HCT166 is functionally and pin compatible with the standard LS166.
The 166 is an 8-bit shift register that has fully synchronous serial or parallel data entry selected by an active LOW Parallel Enable (PE\) input. When the PE\ is LOW one setup time before the LOW-to-HIGH clock transition, parallel data is entered into the register. When PE\ is HIGH, data is entered into the internal bit position Q0 from Serial Data Input (DS), and the remaining bits are shifted one place to the right (Q0 → Q1 → Q2, etc.) with each positive-going clock transition. For expansion of the register in parallel to serial converters, the Q7 output is connected to the DS input of the succeeding stage.
The clock input is a gated OR structure which allows one input to be used as an active LOW Clock Enable (CE\) input. The pin assignment for the CP and CE\ inputs is arbitrary and can be reversed for layout convenience. The LOW-to-HIGH transition of CE\ input should only take place while the CP is HIGH for predictable operation.
A LOW on the Master Reset (MR\) input overrides all other inputs and clears the register asynchronously, forcing all bit positions to a LOW state.
- Buffered Inputs
- Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
- Wide Operating Temperature Range . . . -55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
Data sheet acquired from Harris Semiconductor
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