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CD74HC4017-Q1 - 产品图解:
CD74HC4017-Q1-汽车类具有 10 个解码输出的十进制计数器/除法器
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TI产品 - CD74HC4017-Q1介绍

CD74HC4017-Q1 - 汽车类具有 10 个解码输出的十进制计数器/除法器

CD74HC4017-Q1是TI德州仪器公司的一款计数器/算术/奇偶校验功能产品,CD74HC4017-Q1是汽车类具有 10 个解码输出的十进制计数器/除法器,本站介绍了CD74HC4017-Q1的封装应用图解、特点和优点、功能等,并给出了与CD74HC4017-Q1相关的TI元器件型号供参考。

CD74HC4017-Q1 - 汽车类具有 10 个解码输出的十进制计数器/除法器 - 计数器/算术/奇偶校验功能 - 特殊逻辑 - 德州仪器

产品描述
产品特性

  • Qualified for Automotive Applications
  • Fully Static Operation
  • Buffered Inputs
  • Common Reset
  • Positive Edge Clocking
  • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25°C
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . 15 LSTTL Loads
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • VCC Voltage = 2 V to 6 V
  • High Noise Immunity NIL or NIH = 30% of VCC, VCC = 5 V

DESCRIPTION/ORDERING INFORMATION

The CD74HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each of the decoded outputs normally is low and sequentially goes high on the low-to-high transition clock period of the ten-clock-period cycle. The carry (TC) output transitions low to high after output 9 goes from high to low, and can be used in conjunction with the clock enable (CE) input to cascade several stages. CE disables counting when in the high state. A master reset (MR) input also is provided that, when taken high, sets all the decoded outputs, except output 0, to low.

The device can drive up to ten low-power Schottky equivalent loads.

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