CDC7005 - 高性能、低相位噪声、低偏移的时钟同步器（使参考时钟与 VCXO 同步）

CDC7005是TI德州仪器公司的一款单回路PLL产品，CDC7005是高性能、低相位噪声、低偏移的时钟同步器（使参考时钟与 VCXO 同步），本站介绍了CDC7005的封装应用图解、特点和优点、功能等，并给出了与CDC7005相关的TI元器件型号供参考。

CDC7005 - 高性能、低相位噪声、低偏移的时钟同步器（使参考时钟与 VCXO 同步） - 单回路PLL - 时钟抖动消除器 - 德州仪器

产品描述

The CDC7005 is a high-performance, low-phase noise, and low-skew clock synchronizer and jitter cleaner that synchronizes the voltage controlled crystal oscillator (VCXO) frequency to the reference clock. The programmable predividers M and N give a high flexibility to the frequency ratio of the reference clock to VCXO: VCXO_IN/REF_IN = (NxP)/M. The VCXO_IN clock operates up to 800 MHz. Through the selection of external VCXO and loop filter components, the PLL loop bandwidth and damping factor can be adjusted to meet different system requirements. Each of the five differential LVPECL outputs is programmable by the serial peripheral interface (SPI). The SPI allows individual control of frequency and enable/disable state of each output. The device operates in 3.3-V environment. The built-in latches ensure that all outputs are synchronized.

The CDC7005 is characterized for operation from –40°C to 85°C.

产品特性

High Performance 1:5 PLL Clock Synchronizer
Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock
Synchronizes Frequencies up to 800 MHz (VCXO_IN)
Supports Five Differential LVPECL Outputs
Each Output Frequency Is Selectable by x1, /2, /4, /8, /16
All Outputs Are Synchronized
Integrated Low-Noise OPA for External Low-Pass Filter
Efficient Jitter Screening From Low PLL Loop Bandwidth
Low-Phase Noise Characteristic
Programmable Delay for Phase Adjustments
Predivider Loop BW Adjustment
SPI Controllable Division Setting
Power-Up Control Forces LVPECL Outputs to 3-State at VCC <1.5 V
3.3-V Power Supply
Packaged In 64-Pin BGA (0,8 mm Pitch - ZVA) or 48-Pin QFN (RGZ)
Industrial Temperature Range –40°C to 85°C

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