The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance.

The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5681 is characterized for operation over the industrial temperature range of –40°C to 85°C and is available in a 64-pin QFN package. The device is pin upgradeable to the other members of the family: the DAC5681Z and DAC5682Z. The single-channel DAC5681Z and dual-channel DAC5682Z both provide optional 2x/4x interpolation and a clock multiplying PLL.

• 16-Bit Digital-to-Analog Converter (DAC)
• 1.0 GSPS Update Rate
• 16-Bit Wideband Input LVDS Data Bus
  • 8 Sample Input FIFO
  • On-Chip Delay Lock Loop
• High Performance
  • 73 dBc ACLR WCDMA TM1 at 180 MHz
• On Chip 1.2 V Reference
• Differential Scalable Output: 2 to 20 mA
• Package: 64-Pin 9 × 9 mm QFN