DS90C3202 - 3.3V 8 MHz 至 135 MHz 双路 FPD 链接接收器

DS90C3202是TI德州仪器公司的一款FlatLink/FPD-Link（用于LCD的LVDS）产品，DS90C3202是3.3V 8 MHz 至 135 MHz 双路 FPD 链接接收器，本站介绍了DS90C3202的封装应用图解、特点和优点、功能等，并给出了与DS90C3202相关的TI元器件型号供参考。

DS90C3202 - 3.3V 8 MHz 至 135 MHz 双路 FPD 链接接收器 - FlatLink/FPD-Link（用于LCD的LVDS） - 显示和成像串行器/解串器 - 德州仪器

产品描述

The DS90C3202 is a 3.3V single/dual FPD-Link 10-bit color receiver is designed to be used in Liquid Crystal Display TVs, LCD Monitors, Digital TVs, and Plasma Display Panel TVs. The DS90C3202 is designed to interface between the digital video processor and the display device using the low-power, low-EMI LVDS (Low Voltage Differential Signaling) interface. The DS90C3202 converts up to ten LVDS data streams back into 70 bits of parallel LVCMOS/LVTTL data. The receiver can be programmed with rising edge or falling edge clock. Optional wo-wire serial programming allows fine tuning in development and production environments. With an input clock at 135 MHz, the maximum transmission rate of each LVDS line is 945 Mbps, for an aggregate throughput rate of 9.45 Gbps (945 Mbytes/s). This allows the dual 10-bit LVDS Receiver to support resolutions up to HDTV.

产品特性

Up to 9.45 Gbit/s data throughput
8 MHz to 135 MHz input clock support
Supports up to QXGA panel resolutions
Supports HDTV panel resolutions and frame rates up to 1920 x 1080p
LVDS 30-bit, 24-bit or 18-bit color data inputs
Supports single pixel and dual pixel interfaces
Supports spread spectrum clocking
Two-wire serial communication interface
Programmable clock edge and control strobe select
Power down mode
+3.3V supply voltage
128-pin TQFP Package
Compliant to TIA/EIA-644-A-2001 LVDS Standard

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