DS92LV010A - 总线 LVDS 3.3/5.0V 单片收发器

DS92LV010A是TI德州仪器公司的一款多点LVDS(MLVDS/BLVDS/LVDM)产品，DS92LV010A是总线 LVDS 3.3/5.0V 单片收发器，本站介绍了DS92LV010A的封装应用图解、特点和优点、功能等，并给出了与DS92LV010A相关的TI元器件型号供参考。

DS92LV010A - 总线 LVDS 3.3/5.0V 单片收发器 - 多点LVDS(MLVDS/BLVDS/LVDM) - LVDS/M-LVDS/ECL/CML - 德州仪器

产品描述

The DS92LV010A is one in a series of transceivers designed specifically for the high speed, low power proprietary bus backplane interfaces. The device operates from a single 3.3V or 5.0V power supply and includes one differential line driver and one receiver. To minimize bus loading the driver outputs and receiver inputs are internally connected. The logic interface provides maximum flexibility as 4 separate lines are provided (DIN, DE, RE, and ROUT). The device also features flow through which allows easy PCB routing for short stubs between the bus pins and the connector. The driver has 10 mA drive capability, allowing it to drive heavily loaded backplanes, with impedance as low as 27 Ohms.

The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high speed operation, while consuming minimal power with reduced EMI. In addition the differential signaling provides common mode noise rejection of ±1V.

The receiver threshold is ±100mV over a ±1V common mode range and translates the low voltage differential levels to standard (CMOS/TTL) levels.

产品特性

Bus LVDS Signaling (BLVDS)
Designed for Double Termination Applications
Balanced Output Impedance
Lite Bus Loading 5pF Typical
Glitch Free Power Up/Down (Driver Disabled)
3.3V or 5.0V Operation
±1V Common Mode Range
±100mV Receiver Sensitivity
High Signaling Rate Capability (Above 100 Mbps)
Low Power CMOS Design
Product Offered in 8 Lead SOIC Package
Industrial Temperature Range Operation

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