DS92LV1224 - 30-66 MHz 10 位解串器

DS92LV1224是TI德州仪器公司的一款BLVDS/LVDS串行器/解串器(<100MHz)产品，DS92LV1224是30-66 MHz 10 位解串器，本站介绍了DS92LV1224的封装应用图解、特点和优点、功能等，并给出了与DS92LV1224相关的TI元器件型号供参考。

DS92LV1224 - 30-66 MHz 10 位解串器 - BLVDS/LVDS串行器/解串器(<100MHz) - 串行器、解串器 - 德州仪器

产品描述

The DS92LV1224 is a 300 to 660 Mb/s deserializer for high-speed unidirectional serial data transmission over FR-4 printed circuit board backplanes and balanced copper cables. It receives the Bus LVDS serial data stream from a compatible 10–bit serializer, transforms it back into a 10-bit wide parallel data bus and recovers parallel clock. This single serial data stream simplifies PCB design and reduces PCB cost by narrowing data paths that in turn reduce PCB size and number of layers. The single serial data stream also reduces cable size, the number of connectors, and eliminates clock-to-data and data-to-data skew.

The DS92LV1224 works well with Bus LVDS 10–bit serializers within its specified frequency operating range. It features low power consumption, and high impedance outputs in power down mode.

The DS92LV1224 was designed with the flow-through pinout and is available in a space saving 28–lead SSOP package.

产品特性

30–66 MHz Single 1:10 Deserializer with 300–660 Mb/s Throughput
Robust Bus LVDS Serial Data Transmission with Embedded Clock for Exceptional Noise Immunity and Low EMI
Clock Recovery from PLL Lock to Random Data Patterns
Ensured Transition Every Data Transfer Cycle
Low Power Consumption < 300 mW (typ) at 66 MHz
Single Differential Pair Eliminates Multi-Channel Skew
Flow-Through Pinout for Easy PCB Layout
Synchronization Mode and LOCK Indicator
Programmable Edge Trigger on Clock
High Impedance on Receiver Inputs when Power is Off
Small 28-Lead SSOP Package

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