LM98725是TI公司的一款CCD/CMOS信号调节产品，LM98725是具有 LVDS/CMOS 输出和集成 CCD/CIS 传感器定时发送器的 3 通道 16 位 81 MSPS AFE，本页介绍了LM98725的产品说明、应用、特性等，并给出了与LM98725相关的TI元器件型号供参考。
LM98725 - 具有 LVDS/CMOS 输出和集成 CCD/CIS 传感器定时发送器的 3 通道 16 位 81 MSPS AFE - CCD/CMOS信号调节 - 模拟前端(AFE) - TI公司（Texas Instruments，德州仪器）
- LVDS/CMOS Outputs
- LVDS/CMOS/Crystal Clock Source with PLL Multiplication
- Integrated Flexible Spread Spectrum Clock Generation
- CDS or S/H Processing for CCD or CIS Sensors
- Independent Gain/Offset Correction for Each Channel
- Automatic per-Channel Gain and Offset Calibration
- Programmable Input Clamp Voltage
- Flexible CCD/CIS Sensor Timing Generator
- Multi-Function Peripherals
- High-speed Currency/Check Scanners
- Flatbed or Handheld Color Scanners
- High-speed Document Scanners
- Key Specifications:
- Maximum Input Level
- 1.2 or 2.4 Volt Modes
- (Both with + or - Polarity Option)
- ADC Resolution: 16-Bit
- ADC Sampling Rate: 81 MSPS
- INL: +17/- 28 LSB (typ)
- Channel Sampling Rate: 30/30/27 MSPS
- PGA Gain Steps: 256 Steps
- PGA Gain Range: 0.62 to 8.3x
- Analog DAC Resolution: ±9 Bits
- Analog DAC Range: ±307 mV or ±614 mV
- Digital DAC Resolution: ±6 Bits
- Digital DAC Range: -2048 LSB to + 2016 LSB
- SNR: –74dB (@0 dB PGA Gain)
- Power Dissipation: 755 mW (LVDS)
- Operating Temp: 0 to 70°C
- Supply Voltage: 3.3 V Nominal (3.0-V to 3.6-V Range)
- Maximum Input Level
The LM98725 is a fully integrated, high performance 16-Bit, 81 MSPS signal processing solution for digital color copiers, scanners, and other image processing applications. The LM98725 achieves high-speed signal throughput with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for higher speed CCD or CMOS image sensors). The signal paths utilize 8 bit Programmable Gain Amplifiers (PGA), a ±9-Bit offset correction DAC, and independently controlled Digital Black Level correction loops for each input. The independently programmed PGA and offset DAC allow unique values of gain and offset for each of the three analog inputs. The signals are then routed to a 81 MHz high performance analog-to-digital converter (ADC). The fully differential processing channel shows exceptional noise immunity with a very low noise floor of –74 dB. The 16-bit ADC has excellent dynamic performance making the LM98725 transparent in the image reproduction chain.
A very flexible integrated Spread Spectrum Clock Generation (SSCG) modulator is included to assist with EM compliance and reduce system costs.
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| LM98725 | TSSOP (56) | 14.0 mm × 6.10 mm |
