The SCAN25100 is a 2457.6, 1228.8, and 614.4 Mbps serializer/deseralizer (SerDes) for high-speed bidirectional serial data transmission over FR-4 printed circuit board backplanes, balanced cables, and optical fiber. The SCAN25100 integrates precision delay calibration measurement (DCM) circuitry that measures link delay components to better than ± 800 ps accuracy.

The SCAN25100 features independent transmit and receive PLLs, on-chip oscillator, and intelligent clock management circuitry to automatically perform remote radio head synchronization and reduce the cost and complexity of external clock networks.

The SCAN25100 is programmable though an MDIO interface as well as through pins, featuring configurable transmitter de-emphasis, receiver equalization, speed rate selection, internal pattern generation/verification, and loop back modes. In addition to at-speed BIST, the SCAN25100 includes IEEE 1149.1 and 1149.6 testability.

• Exceeds LV and HV CPRI Voltage and Jitter Requirements
• 2457.6, 1228.8, and 614.4 Mbps Operation
• Integrated Delay Calibration Measurement (DCM) Directly Measures T14 and Toffset Delays to ≤ ± 800 ps
• DCM Also Measures Chip and Other Delays to ≤ ± 1200 ps Accuracy
• Deterministic Chip Latency
• Independent Transmit and Receive PLLs for Seamless RE Synchronization
• Low Noise Recovered Clock Output
• Requires No Jitter Cleaning in Single-Hop Applications
• >8 kV ESD on the CML IO, >7 kV on All Other Pins, >2 kV CDM
• Hot Plug Protection
• LOS, LOF, 8b/10b Line Code Violation, Comma, and Receiver PLL Lock Reporting
• Programmable Hyperframe Length and Start of Hyperframe Character
• Programmable Transmit De-Emphasis and Receive Equalization With On-Chip Termination
• Advanced Testability Features
  • IEEE 1149.1 and 1149.6
  • At-Speed BIST Pattern Generator/Verifier
  • Multiple Loopback Modes
• 1.8V or 3.3V Compatible Parallel Bus Interface
• 100-pin HTQFP Package with Exposed Dap
• Industrial –40 to +85° C Temperature Range