TI公司,TI官网,TI代理商
TI(德州仪器)|TI产品型号搜索:
专营TI(德州仪器)元器件,强大的现货交付能力,解决您的采购难题
全流程提供TI(德州仪器)现货供应链服务
当前位置:TI代理 > > TI芯片 >> SCAN92LV090
SCAN92LV090技术文档下载:
SCAN92LV090技术文档产品手册下载
SCAN92LV090 - 产品图解:
SCAN92LV090-具有边界扫描的 9 通道总线 LVDS 收发器
TI芯片:
承诺原装正品
专营TI德州仪器,真正优化您的供应链
TI产品 - SCAN92LV090介绍

SCAN92LV090 - 具有边界扫描的 9 通道总线 LVDS 收发器

SCAN92LV090是TI德州仪器公司的一款中继器/缓冲器产品,SCAN92LV090是具有边界扫描的 9 通道总线 LVDS 收发器,本站介绍了SCAN92LV090的封装应用图解、特点和优点、功能等,并给出了与SCAN92LV090相关的TI元器件型号供参考。

SCAN92LV090 - 具有边界扫描的 9 通道总线 LVDS 收发器 - 中继器/缓冲器 - LVDS/M-LVDS/ECL/CML - 德州仪器

产品描述

The SCAN92LV090A is one in a series of Bus LVDS transceivers designed specifically for the high speed, low power proprietary backplane or cable interfaces. The device operates from a single 3.3V power supply and includes nine differential line drivers and nine receivers. To minimize bus loading, the driver outputs and receiver inputs are internally connected. The separate I/O of the logic side allows for loop back support. The device also features a flow through pin out which allows easy PCB routing for short stubs between its pins and the connector.

The driver translates 3V TTL levels (single-ended) to differential Bus LVDS (BLVDS) output levels. This allows for high speed operation, while consuming minimal power with reduced EMI. In addition, the differential signaling provides common mode noise rejection of ±1V.

The receiver threshold is less than ±100 mV over a ±1V common mode range and translates the differential Bus LVDS to standard (TTL/CMOS) levels.

This device is compliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with the incorporation of the defined boundary-scan test logic and test access port consisting of Test Data Input (TDI), Test Data Out (TDO), Test Mode Select (TMS), Test Clock (TCK), and the optional Test Reset (TRST).

产品特性

  • IEEE 1149.1 (JTAG) Compliant
  • Bus LVDS Signaling
  • Low Power CMOS Design
  • High Signaling Rate Capability (Above 100 Mbps)
  • 0.1V to 2.3V Common Mode Range for VID = 200mV
  • ±100 mV Receiver Sensitivity
  • Supports Open and Terminated Failsafe on Port Pins
  • 3.3V Operation
  • Glitch Free Power Up/Down (Driver & Receiver Disabled)
  • Light Bus Loading (5 pF Typical) per Bus LVDS Load
  • Designed for Double Termination Applications
  • Balanced Output Impedance
  • Product Offered in 64 Pin LQFP Package and NFBGA Package
  • High Impedance Bus Pins on Power Off (VCC = 0V)

下面可能是您感兴趣的TI德州仪器公司中继器/缓冲器元器件
节约时间成本,提高采购效率,TI官网授权代理
TI公司|TI德州仪器|德州仪器TI公司代理商|TI芯片代理商
TI公司产品现货专家,订购TI公司产品不限最低起订量,TI芯片大陆现货即时发货,香港库存3-5天发货,海外库存7-10天发货
寻找全球TI代理商现货货源 - TI公司(德州仪器)电子元件在线订购