SLK2721 - 具有增强抖动容限的 OC-48/24/12/3 SONET SDH 多速率收发器

SLK2721是TI德州仪器公司的一款电信和无线串行器/解串器产品，SLK2721是具有增强抖动容限的 OC-48/24/12/3 SONET SDH 多速率收发器，本站介绍了SLK2721的封装应用图解、特点和优点、功能等，并给出了与SLK2721相关的TI元器件型号供参考。

SLK2721 - 具有增强抖动容限的 OC-48/24/12/3 SONET SDH 多速率收发器 - 电信和无线串行器/解串器 - 串行器、解串器 - 德州仪器

产品描述

The SLK2721 device is a single chip, multirate transceiver that derives high-speed timing signals for SONET/ SDH-based equipment. The device performs clock and data recovery, serial-to-parallel/parallel-to-serial conversion, and a frame detection function conforming to the SONET/SDH standards.

The device can be configured to operate under OC-48, OC-24, OC-12, or OC-3 data rate through the rate selection pins or the autorate detection function. An external reference clock operating at 622.08 MHz is required for the recovery loop, and it also provides a stable clock source in the absence of serial data transitions.

The SLK2721 device accepts 4-bit LVDS parallel data/clock and generates a NRZ SONET/SDH-compliant signal at the OC-3, OC-12, OC-24, or OC-48 data rate. It also recovers the data and clock from the serial SONET stream and demultiplexes it into 4-bit LVDS parallel data for full duplex operation. TXDATA0 and RXDATA0 are the first bits that are transmitted and received in time, respectively. The serial interface is a low jitter, PECL-compatible differential interface.

The SLK2721 device supports an FEC data rate up to 2.7 Gbps when configured to operate at the OC-48 data rate and provided with an external reference clock that is properly scaled.

The SLK2721 device provides a comprehensive suite of built-in tests for self-test purposes including local and remote loopback and pseudorandom bit stream (PRBS) (27-1) generation and verification.

The device comes in a 100-pin VQFP package that requires a single 2.5-V supply with 3.3-V tolerant inputs on the control pins. The SLK2721 device is very power efficient, dissipating less than 900 mW at 2.488 Gbps, the OC-48 data rate. It is characterised for operation from -40°C to 85°C.

产品特性

Fully Integrated SONET/SDH Transceiver to Support Clock/Data Recovery and Multiplexer/Demultiplexer Functions
Enhanced Jitter Tolerance Over SLK2701
Supports 2.7 Gbps OC-48 FEC Rate, OC-48, OC-24, OC-12, Gigabit Ethernet, and OC-3 Data Rate With Autorate Detection
Supports Transmit Only, Receiver Only, Transceiver and Repeater Functions in a Single Chip Through Configuration Pins
Supports SONET/SDH Frame Detection
On-Chip PRBS Generation and Verification
Supports 4-Bit LVDS (OIF99.102) Electrical Interface
Single 2.5-V Power Supply
Interfaces to Back Plane, Copper Cables, or Optical Modules
Hot Plug Protection
Low Jitter PECL-Compatible Differential Serial Interface With Programmable De-Emphasis for the Serial Output
On-Chip Termination for LVDS and PECL-Compatible Interface
Receiver Differential Input Thresholds 150 mV Minimum
Supports SONET Loop Timing
Low Power <900 mW at OC-48 Data Rate
ESD Protection >2 kV
622-MHz Reference Clock
Maintains Clock Output in Absence of Data
Local and Remote Loopback
Parity Checking and Generation for the LVDS Interface
100-Pin PZP Package With PowerPAD™ Design

PowerPAD is a trademark of Texas Instruments.

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