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SN54ABT374 - 产品图解:
SN54ABT374-具有三态输出的八路边沿 D 类触发器
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TI产品 - SN54ABT374介绍
SN54ABT374 - 具有三态输出的八路边沿 D 类触发器

SN54ABT374是TI公司的一款D类触发器产品,SN54ABT374是具有三态输出的八路边沿 D 类触发器,本页介绍了SN54ABT374的产品说明、应用、特性等,并给出了与SN54ABT374相关的TI元器件型号供参考。

SN54ABT374 - 具有三态输出的八路边沿 D 类触发器 - D类触发器 - 触发器/锁存器/寄存器 - TI公司(Texas Instruments,德州仪器)

产品描述

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the SN54ABT374 and SN74ABT374A are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable () input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT374 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT374A is characterized for operation from -40°C to 85°C.

产品特性

  • State-of-the-Art EPIC-IIBTM BiCMOS Design Significantly Reduces Power Dissipation
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Plastic (N) and Ceramic (J) DIPs, and Ceramic Flat (W) Package

EPIC-IIB is a trademark of Texas Instruments Incorporated.

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