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- UCC3819DG4 - 电源管理IC - PFC(功率因数校正)
- SN75ALS199DRE4 - 集成电路(IC) > 接口 > 驱动器,接收器,收发器
- AFE5808ZCF - 集成电路(IC) > 数据采集 > 模拟前端(AFE)
- AM6442BSEGHAALV - 集成电路(IC) > 嵌入式 > 微处理器
- LMX25021635EVAL/NOPB - 评估和演示板及套件
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SN54AS823A - 具有三态输出的 9 位总线接口触发器
SN54AS823A是TI德州仪器公司的一款D类触发器产品,SN54AS823A是具有三态输出的 9 位总线接口触发器,本站介绍了SN54AS823A的封装应用图解、特点和优点、功能等,并给出了与SN54AS823A相关的TI元器件型号供参考。
SN54AS823A - 具有三态输出的 9 位总线接口触发器 - D类触发器 - 触发器/锁存器/寄存器 - 德州仪器
These 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers, parity bus interfacing, and working registers.
With the clock-enable () input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock (CLK) input. Taking high disables the clock buffer, latching the outputs. The SN54AS823A and SN74AS823A have noninverting data (D) inputs and the SN74AS824A has inverting (D\) inputs. Taking the clear () input low causes the nine Q outputs to go low independently of the clock.
A buffered output-enable () input can be used to place the nine outputs in either a normal logic state (high or low logic level) or the high- impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN54AS823A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS823A and SN74AS824A are characterized for operation from 0°C to 70°C.
- Functionally Equivalent to AMD's AM29823 and AM29824
- Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity
- Outputs Have Undershoot-Protection Circuitry
- Power-Up High-Impedance State
- Buffered Control Inputs to Reduce dc Loading Effects
- Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs
- BQ34Z100-G1 - 多化合物 Impedance Track 独立电量监测计
- TPS65000-Q1 - 具有双路 LDO 和 SVS 的 2.25MHz 降压转换器
- TPS51624 - 2 相用于 VR12.6 VCPU 的 D-CAP+TM 降压控制器
- SN5451 - 与或反向门
- TLVH431A - 低电压可调节精密并联稳压器
- TPS65055 - 具有 4 个低输入电压 LDO 的 2.25MHz 双路降压转换器
- DS90UB926Q-Q1 - 具有双向控制通道的 5-85 MHz 24 位 彩色 FPD-Link III 解串器
- LMK02000 - 具有集成 PLL 的精密时钟分配器
- TDC1011 - TDC1011 用于液位感测、流量感测的超声波感测模拟前端 (AFE)
- TPS61151 - TPS61150/1 数据表



