SN54S112 - 具有预设和清零功能的双路 J-K 下降沿触发器

SN54S112是TI德州仪器公司的一款D类触发器产品，SN54S112是具有预设和清零功能的双路 J-K 下降沿触发器，本站介绍了SN54S112的封装应用图解、特点和优点、功能等，并给出了与SN54S112相关的TI元器件型号供参考。

SN54S112 - 具有预设和清零功能的双路 J-K 下降沿触发器 - D类触发器 - 触发器/锁存器/寄存器 - 德州仪器

产品描述

These devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset and clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the negative-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by tying J and K high.

The SN54LS112A and SN54S112 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LS112A and SN74S112A are characterized for operation from 0°C to 70°C.

产品特性

Fully Buffered to Offer Maximum Isolation from External Disturbance
Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
Dependable Texas Instruments Quality and Reliability

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