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SN65LVDT100技术文档下载：
SN65LVDT100 - 产品图解：
SN65LVDT100 - 2Gbps LVDS/LVPECL/CML 至 LVDS 中继器/转换器
SN65LVDT100是TI公司的一款中继器/缓冲器产品，SN65LVDT100是2Gbps LVDS/LVPECL/CML 至 LVDS 中继器/转换器，本页介绍了SN65LVDT100的产品说明、应用、特性等，并给出了与SN65LVDT100相关的TI元器件型号供参考。
SN65LVDT100 - 2Gbps LVDS/LVPECL/CML 至 LVDS 中继器/转换器 - 中继器/缓冲器 - LVDS/M-LVDS/ECL/CML - TI公司（Texas Instruments，德州仪器）
产品特性
- Designed for Signaling Rates ≥ 2 Gbps
- Total Jitter < 65 ps
- Low-Power Alternative for the MC100EP16
- Low 100-ps (Maximum) Part-to-Part Skew
- 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Input Voltage Range
- Inputs Electrically Compatible With LVPECL, CML, and LVDS Signal Levels
- 3.3-V Supply Operation
- LVDT Integrates 110-Ω Terminating Resistor
- Offered in SOIC and MSOP
产品应用
- Wireless Infrastructure
- Telecom Infrastructure
- Printers
产品说明
The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are high-speed differential receivers and drivers connected as repeaters. The receiver accepts low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL), or current-mode logic (CML) input signals at rates up to 2 Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter.
产品器件信息
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| SN65LVDS100 | SOIC (8) | 4.90 mm × 3.91 mm |
| VSSOP (8) | 3.00 mm × 3.00 mm | |
| SN65LVDT100 | SOIC (8) | 4.90 mm × 3.91 mm |
| VSSOP (8) | 3.00 mm × 3.00 mm | |
| SN65LVDS101 | SOIC (8) | 4.90 mm × 3.91 mm |
| VSSOP (8) | 3.00 mm × 3.00 mm | |
| SN65LVDT101 | SOIC (8) | 4.90 mm × 3.91 mm |
| VSSOP (8) | 3.00 mm × 3.00 mm |
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