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SN74ALVCH16500-具有三态输出的 18 位通用总线收发器
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TI产品 - SN74ALVCH16500介绍

SN74ALVCH16500 - 具有三态输出的 18 位通用总线收发器

SN74ALVCH16500是TI德州仪器公司的一款通用总线收发器(UBT)产品，SN74ALVCH16500是具有三态输出的 18 位通用总线收发器，本站介绍了SN74ALVCH16500的封装应用图解、特点和优点、功能等，并给出了与SN74ALVCH16500相关的TI元器件型号供参考。

SN74ALVCH16500 - 具有三态输出的 18 位通用总线收发器 - 通用总线收发器(UBT) - 通用总线功能 - 德州仪器

产品描述

This 18-bit universal bus transceiver is designed for 1.65-V to 3.6-V VCC operation.

Data flow in each direction is controlled by output-enable (OEAB and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB\ and CLKBA\) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB\ is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB\. Output-enable OEAB is active high. When OEAB is high, the B-port outputs are active. When OEAB is low, the B-port outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B, but uses OEBA\, LEBA, and CLKBA\. The output enables are complementary (OEAB is active high, and OEBA\ is active low).

To ensure the high-impedance state during power up or power down, OEBA\ should be tied to VCC through a pullup resistor, and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.

Active bus-hold circuitry holds unused or floating data inputs at a valid logic state.

The SN74ALVCH16500 is characterized for operation from –40°C to 85°C.

产品特性

  • Member of the Texas Instruments Widebus™ Family
  • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
  • UBT™ (Universal Bus Transceiver) Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Modes
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

Widebus, EPIC, UBT are trademarks of Texas Instruments.

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