SN74ALVCHG162282 - 具有三态输出的 18 位至 36 位寄存总线交换器

SN74ALVCHG162282是TI德州仪器公司的一款通用总线交换器(UBE)产品，SN74ALVCHG162282是具有三态输出的 18 位至 36 位寄存总线交换器，本站介绍了SN74ALVCHG162282的封装应用图解、特点和优点、功能等，并给出了与SN74ALVCHG162282相关的TI元器件型号供参考。

SN74ALVCHG162282 - 具有三态输出的 18 位至 36 位寄存总线交换器 - 通用总线交换器(UBE) - 通用总线功能 - 德州仪器

产品描述

The SN74ALVCHG162282 is an 18-bit to 36-bit registered bus exchanger. This device is intended for use in applications where data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. It is designed specifically for low-voltage (3.3-V) VCC operation.

The device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input. For data transfer in the B-to-A direction, the select (SEL\) input selects 1B or 2B data for the A outputs.

For data transfer in the A-to-B direction, a two-stage pipeline is provided in the 1B path, with a single storage register in the 2B path. Data flow is controlled by the active-low output-enable (OE\) and direction-control (DIR) input. DIR is registered to synchronize the bus direction changes with the clock.

The A-port N-channel output transistors are sized at 450 µm and the P-channel output transistors are sized at 700 µm. All A-port outputs have equivalent 50- series resistors.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The switching characteristics are based on 25-pF (A port) and 80-pF (B port) loads, but are tested with the standard 50-pF load.

The SN74ALVCHG162282 is characterized for operation from 0°C to 70°C.

产品特性

Member of the Texas Instruments Widebus™ Family
EPIC™ (Enhanced-Performance Implanted CMOS) Sub-Micron Process
A-Port Outputs Have Equivalent 50- Series Resistors and B-Port Outputs Have Equivalent 20- Series Resistors, So No External Resistors Are Required
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JESD 17
Bus-Hold On Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Packaged in Thin Very Small-Outline Package

NOTE: For order entry: The DBB package is abbreviated to G. For tape and reel: The DBBR package is abbreviated to GR. Widebus, EPIC are trademarks of Texas Instruments.

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