SN74ALVCHR16269A是TI公司的一款通用总线交换器(UBE)产品，SN74ALVCHR16269A是具有三态输出的 12 位到 24 位寄存总线交换器，本页介绍了SN74ALVCHR16269A的产品说明、应用、特性等，并给出了与SN74ALVCHR16269A相关的TI元器件型号供参考。
SN74ALVCHR16269A - 具有三态输出的 12 位到 24 位寄存总线交换器 - 通用总线交换器(UBE) - 通用总线功能 - TI公司（Texas Instruments，德州仪器）
This 12-bit to 24-bit registered bus exchanger is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCHR16269A is used in applications in which two ports must be multiplexed onto, or demultiplexed from, a single port. It is particularly suitable as an interface between synchronous DRAMs and high-speed microprocessors.
Data is stored in the internal B-port registers on the low-to-high transition of the clock (CLK) input when the appropriate clock-enable (CLKENA)\ inputs are low. Proper control of these inputs allows two sequential 12-bit words to be presented as a 24-bit word on the B port. For data transfer in the B-to-A direction, a single storage register is provided. The select (SEL)\ line selects 1B or 2B data for the A outputs. The register on the A output permits the fastest possible data transfer, thus extending the period during which the data is valid on the bus. The control terminals are registered so that all transactions are synchronous with CLK. Data flow is controlled by the active-low output enables (OEA\, OEB1\, and OEB2\).
To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as possible and OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Due to OE\ being routed through a register, the active state of the outputs cannot be determined prior to the arrival of the first clock pulse.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
All outputs are designed to sink up to 12 mA, and include equivalent 26- resistors to reduce overshoot and undershoot.
- Member of the Texas Instruments Widebus™ Family
- Operates From 1.65-V to 3.6-V VCC
- Max tpd of 5.2 ns at 3.3-V
- ±24-mA Output Drive at 3.3-V
- All Outputs Have Equivalent 26- Series Resistors, So No External Resistors Are Required
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
Widebus are trademarks of Texas Instruments Incorporated.
