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SN74LV595A-Q1 - 产品图解:
SN74LV595A-Q1-汽车类具有三态输出寄存器的 8 位移位寄存器
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TI产品 - SN74LV595A-Q1介绍

SN74LV595A-Q1 - 汽车类具有三态输出寄存器的 8 位移位寄存器

SN74LV595A-Q1是TI德州仪器公司的一款移位寄存器产品,SN74LV595A-Q1是汽车类具有三态输出寄存器的 8 位移位寄存器,本站介绍了SN74LV595A-Q1的封装应用图解、特点和优点、功能等,并给出了与SN74LV595A-Q1相关的TI元器件型号供参考。

SN74LV595A-Q1 - 汽车类具有三态输出寄存器的 8 位移位寄存器 - 移位寄存器 - 触发器/锁存器/寄存器 - 德州仪器

产品描述

The SN74LV595A is an 8-bit shift register designed for 2-V to 5.5-V VCC operation.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable (OE) input is high, all outputs except QH' are in the high-impedance state.

Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

产品特性

  • Qualified for Automotive Applications
  • Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval
  • 2-V to 5.5-V VCC Operation
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Supports Mixed-Mode Voltage Operation on All Ports
  • 8-Bit Serial-In, Parallel-Out Shift
  • Ioff Supports Partial-Power-Down Mode Operation
  • Shift Register Has Direct Clear

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