SN74LVC1G125-Q1 - 汽车类具有三态输出的单路总线缓冲器门

SN74LVC1G125-Q1是TI德州仪器公司的一款无产品，SN74LVC1G125-Q1是汽车类具有三态输出的单路总线缓冲器门，本站介绍了SN74LVC1G125-Q1的封装应用图解、特点和优点、功能等，并给出了与SN74LVC1G125-Q1相关的TI元器件型号供参考。

SN74LVC1G125-Q1 - 汽车类具有三态输出的单路总线缓冲器门 - 无 - 小尺寸逻辑器件 - 德州仪器

产品描述

产品特性

Qualified for Automotive Applications
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Ioff Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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