

- SN74CBT3125RGYR - 集成电路(IC) > 逻辑 > 信号开关,多路复用器,解码器
- 74AC11014DW - 集成电路(IC) > 逻辑 > 门和反相器
- TPS61162YFFR - 集成电路(IC) > 电源管理(PMIC) > LED 驱动器
- LP5813BDRRR - 集成电路(IC) > 电源管理(PMIC) > LED 驱动器
- CD74HCT4053MT - 集成电路(IC) > 接口 > 模拟开关,多路复用器,解复用器
- TPS7A20185PDBVR - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - 线性
- 4539BDM - 集成电路(IC) > 逻辑 > 信号开关,多路复用器,解码器
- SNJ55501CJ - 集成电路(IC) > 接口 > 驱动器,接收器,收发器
- DAC5311IDCKT - 集成电路(IC) > 数据采集 > 数模转换器(DAC)
- CDCP1803RGET - 集成电路(IC) > 时钟/定时 > 时钟缓冲器,驱动器
- ADS7890IPFBRG4 - 集成电路(IC) > 数据采集 > 模数转换器(ADC)
- LP38856S-0.8/NOPB - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - 线性
- LM4906MMBD - 开发板,套件,编程器 > 评估板 > 音频放大器评估板
- TPS62140ARGTR - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - DC-DC 开关稳压器
- TLC7528IDW - 集成电路(IC) > 数据采集 > 数模转换器(DAC)
- RI-ANT-S01C-00 - 射频和无线 > RFID 天线
- SN74ACT04DR - 集成电路(IC) > 逻辑 > 门和反相器
- CD4516BPW - 集成电路(IC) > 逻辑 > 计数器,除法器
- LP3879MRX-1.0/NOPB - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - 线性
- TMSDVC5416GGUR160 - 集成电路(IC) > 嵌入式 > DSP(数字信号处理器)



SN74LVC574A-Q1 - 汽车类具有三态输出的八路边沿 D 类触发器
SN74LVC574A-Q1是TI德州仪器公司的一款D类触发器产品,SN74LVC574A-Q1是汽车类具有三态输出的八路边沿 D 类触发器,本站介绍了SN74LVC574A-Q1的封装应用图解、特点和优点、功能等,并给出了与SN74LVC574A-Q1相关的TI元器件型号供参考。
SN74LVC574A-Q1 - 汽车类具有三态输出的八路边沿 D 类触发器 - D类触发器 - 触发器/锁存器/寄存器 - 德州仪器
- Qualified for Automotive Applications
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Operates From 2 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 7 ns at 3.3 V
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
- Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
- Ioff Supports Partial-Power-Down Mode Operation
DESCRIPTION/ORDERING INFORMATION
The SN74LVC574A octal edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation.
This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of thIs device as a translator in a mixed 3.3-V/5-V system environment.
- TLV62090 - 3A 高效同步降压转换器
- TPS74901 - 单路输出 LDO、3.0A、可调节 (0.8 至 3.6V)可编程软启动
- UCC27200A - 120V 升压 3A 峰值电流的高频高端/低端驱动器
- LMV242 - 双输出、四频带 GSM/GPRS 功率放大器控制器
- ISO1050 - 隔离式 5V CAN 收发器
- DAC8043 - CMOS 12 位串行输入乘法数模转换器
- LM5574 - SIMPLE SWITCHER? 75V、0.5A 降压开关稳压器
- SN75472 - 双路高电压大电流外设驱动器
- ADC0816 - 具有 16 通道多路复用器的 8 位微处理器兼容 A/D 转换器
- MSP430FG477 - 16 位超低功耗 MCU、32KB Flash、2KB RAM、16 位 Sigma-Delta ADC、12 位 DAC、运算放大器、128Seg LCD



