SN75LVDS84 - FlatLink(TM) 发送器

SN75LVDS84是TI德州仪器公司的一款FlatLink/FPD-Link（用于LCD的LVDS）产品，SN75LVDS84是FlatLink(TM) 发送器，本站介绍了SN75LVDS84的封装应用图解、特点和优点、功能等，并给出了与SN75LVDS84相关的TI元器件型号供参考。

SN75LVDS84 - FlatLink(TM) 发送器 - FlatLink/FPD-Link（用于LCD的LVDS） - 显示和成像串行器/解串器 - 德州仪器

产品描述

The SN75LVDS84 FlatLink™ transmitter contains three 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended low-voltage TTL (LVTTL) data to be synchronously transmitted over three balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS82 or SN75LVDS86.

When transmitting, data bits D0–D20 are each loaded into registers of the SN75LVDS84 on the falling edge of the input clock signal (CLKIN). The frequency of CLKIN is multiplied seven times and then used to unload the data registers in 7-bit slices and serially. The three serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.

The SN75LVDS84 requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The only possible user intervention is the use of the shutdown/clear (SHTDN) active-low input to inhibit the clock and shut off the LVDS output drivers for lower power consumption. A low level on this signal clears all internal registers to a low level.

The SN75LVDS84 is characterized for operation over ambient free-air temperatures of 0°C to 70°C.

产品特性

21:3 Data Channel Compression at up to 163 Million Bytes per Second Throughput
Suited for SVGA, XGA, or SXGA Data Transmission From Controller to Display With Very Low EMI
21 Data Channels Plus Clock-In Low-Voltage TTL and 3 Data Channels Plus Clock-Out Low-Voltage Differential
Operates From a Single 3.3-V Supply and 250 mW (Typ)
5-V Tolerant Data Inputs
ESD Protection Exceeds 6 kV
SN75LVDS84 Has Falling-Clock Edge-Triggered Inputs
Packaged in Thin Shrink Small-Outline Package (TSSOP) With 20-Mil Terminal Pitch
Consumes Less Than 1 mW When Disabled
Wide Phase-Lock Input Frequency Range:
- 31 MHz to 68 MHz
No External Components Required for PLL
Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
Improved Replacement for the DS90C561

FlatLink is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

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