THS1206-EP - 增强型产品 12位，6Msps Adc，具有四通道（配置），Dsp/Up If，集成 16x Fifo

THS1206-EP是TI德州仪器公司的一款精密ADC(<=10MSPS)产品，THS1206-EP是增强型产品 12位，6Msps Adc，具有四通道（配置），Dsp/Up If，集成 16x Fifo，本站介绍了THS1206-EP的封装应用图解、特点和优点、功能等，并给出了与THS1206-EP相关的TI元器件型号供参考。

THS1206-EP - 增强型产品 12位，6Msps Adc，具有四通道（配置），Dsp/Up If，集成 16x Fifo - 精密ADC(<=10MSPS) - 模数转换器 - 德州仪器

产品描述

The THS1206 is a CMOS, low-power, 12-bit, 6 MSPS analog-to-digital converter (ADC). The speed, resolution, bandwidth, and single-supply operation are suited for applications in radar, imaging, high-speed acquisition, and communications. A multistage pipelined architecture with output error correction logic provides for no missing codes over the full operating temperature range. Internal control registers are used to program the ADC into the desired mode. The THS1206 consists of four analog inputs, which are sampled simultaneously. These inputs can be selected individually and configured to single-ended or differential inputs. An integrated 16 word deep FIFO allows the storage of data in order to take the load off of the processor connected to the ADC. Internal reference voltages for the ADC (1.5 V and 3.5 V) are provided.

An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the application. Two different conversion modes can be selected. In single conversion mode, a single and simultaneous conversion of up to four inputs can be initiated by using the single conversion start signal (CONVST)\. The conversion clock in single conversion mode is generated internally using a clock oscillator circuit. In continuous conversion mode, an external clock signal is applied to the CONV_CLK input of the THS1206. The internal clock oscillator is switched off in continuous conversion mode.

产品特性

Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
Extended Temperature Performance of –55°C to 125°C
Enhanced Diminishing Manufacturing Sources (DMS) Support
Enhanced Product Change Notification
Qualification Pedigree
High-Speed 6 MSPS ADC
4 Single-Ended or 2 Differential Inputs
Simultaneous Sampling of 4 Single-Ended Signals or 2 Differential Signals or Combination of Both
Differential Nonlinearity Error: ±1 LSB
Integral Nonlinearity Error: ±1.8 LSB
Signal-to-Noise and Distortion Ratio: 68 dB at fI = 2 MHz
Auto-Scan Mode for 2, 3, or 4 Inputs
3-V or 5-V Digital Interface Compatible
Low Power: 216 mW Max
5-V Analog Single Supply Operation
Internal Voltage References . . . 50 PPM/°C and ±5% Accuracy
Glueless DSP Interface
Parallel µC/DSP Interface
Integrated FIFO
Available in TSSOP Package
applications
- Radar Applications
- Communications
- Control Applications
- High-Speed DSP Front-End
- Selected Military Applications

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

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THS1206-EP - 增强型产品 12位，6Msps Adc，具有四通道 （配置），Dsp/Up If，集成 16x Fifo

THS1206-EP - 增强型产品 12位，6Msps Adc，具有四通道（配置），Dsp/Up If，集成 16x Fifo