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TM4C129CNCPDT - Tiva C 系列 TM4C129CNCPDT 微控制器数据表
TM4C129CNCPDT是TI德州仪器公司的一款控制+自动化产品,TM4C129CNCPDT是Tiva C 系列 TM4C129CNCPDT 微控制器数据表,本站介绍了TM4C129CNCPDT的封装应用图解、特点和优点、功能等,并给出了与TM4C129CNCPDT相关的TI元器件型号供参考。
TM4C129CNCPDT - Tiva C 系列 TM4C129CNCPDT 微控制器数据表 - 控制+自动化 - 高性能MCU - 德州仪器
Tiva™ C Series microcontrollers integrate a large variety of rich communication features to enable a new class of highly connected designs with the ability to allow critical, real-time control between performance and power. The microcontrollers feature integrated communication peripherals along with other high-performance analog and digital functions to offer a strong foundation for many different target uses, spanning from human machine interface to networked system management controllers.
In addition, Tiva™ C Series microcontrollers offer the advantages of ARM's widely available development tools, System-on-Chip (SoC) infrastructure, and a large user community. Additionally, these microcontrollers use ARM's Thumb®-compatible Thumb-2 instruction set to reduce memory requirements and, thereby, cost. Finally, the TM4C129CNCPDT microcontroller is code-compatible to all members of the extensive Tiva™ C Series, providing flexibility to fit precise needs.
Texas Instruments offers a complete solution to get to market quickly, with evaluation and development boards, white papers and application notes, an easy-to-use peripheral driver library, and a strong support, sales, and distributor network.
- Performance
- ARM® Cortex™-M4F processor core
- 120-MHz operation; 150 DMIPS performance
- 1024 KB Flash memory
- 256 KB single-cycle System SRAM
- 6KB of EEPROM
- Internal ROM loaded with TivaWare™ for C Series software
- 8-/16-/32- bit dedicated External Peripheral Interface (EPI) for peripherals and memory
- Security
- Cyclical Redundancy Check (CRC) hardware with 16-/32-bit Hash function that supports four CRC forms
- Advanced Encryption Standard (AES) hardware-accelerated data encryption and decryption based on 128-, 192-, and 256-bit keys
- Data Encryption Standard (DES) block cipher implementation with 168-bit effective key length
- Hardware Accelerated Hash (SHA/MD5) advanced hash engine that supports SHA-1, SHA-2 or MD5 Hash computation
- Support for four tamper inputs and configurable tamper event response
- Communication Interfaces
- Eight Universal Asynchronous Receivers/Transmitters (UARTs)
- Four Quad Synchronous Serial Interface (QSSI) modules with Bi-, Quad- and advanced SSI support
- Ten Inter-Integrated Circuit (I2C) modules with four transmission speeds including high-speed mode
- Two Controller Area Network (CAN) 2.0 A/B controllers
- Universal Serial Bus (USB) 2.0 OTG/Host/Device with ULPI interface option and Link Power Management (LPM) support
- ARM® PrimeCell® 32-channel configurable Micro Direct Memory Access (µDMA) controller
- Eight 16/32-bit General-Purpose Timer (GPTM) blocks
- Two watchdog timers
- Low-power battery-backed Hibernation module
- 15 physical General-Purpose Input/Output (GPIO) blocks
- One Pulse Width Modulator (PWM) module, with four PWM generator blocks and a control block, for a total of 8 PWM outputs
- One Quadrature Encoder Interface (QEI) module
- Two 12-bit Analog-to-Digital Converter (ADC) modules, each with a maximum sample rate of one million samples/second
- Three independent integrated analog comparators
- 16 digital comparators
- Industrial (-40°C to 85°C) temperature range
- Extended (-40°C to 105°C) temperature range
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