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TPS65020 - 产品图解：
TPS65020-6 通道电源管理 IC (PMIC)，具有 3 个 DC/DC、3 个 LDO 以及 I2C 接口和动态电压调节功能
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TI产品 - TPS65020介绍

TPS65020 - 6 通道电源管理 IC (PMIC)，具有 3 个 DC/DC、3 个 LDO 以及 I2C 接口和动态电压调节功能

TPS65020是TI德州仪器公司的一款无产品，TPS65020是6 通道电源管理 IC (PMIC)，具有 3 个 DC/DC、3 个 LDO 以及 I2C 接口和动态电压调节功能，本站介绍了TPS65020的封装应用图解、特点和优点、功能等，并给出了与TPS65020相关的TI元器件型号供参考。

TPS65020 - 6 通道电源管理 IC (PMIC)，具有 3 个 DC/DC、3 个 LDO 以及 I2C 接口和动态电压调节功能 - 无 - 电源管理多通道IC(PMIC)解决方案 - 德州仪器

产品描述

The TPS65020 is an integrated Power Management IC for applications powered by one Li-Ion or Li-Polymer cell, and which require multiple power rails. The TPS65020 provides three highly efficient, step-down converters targeted at providing the core voltage, peripheral, I/O and memory rails in a processor based system. All three step-down converters enter a low-power mode at light load for maximum efficiency across the widest possible range of load currents. The TPS65020 also integrates two 200-mA LDO voltage regulators, which are enabled with an external input pin. Each LDO operates with an input voltage range between 1.5 V and 6.5 V, allowing them to be supplied from one of the step-down converters or directly from the main battery. The two 200-mA LDO voltage regulators are intended for use with the SDRAM and PLL power supply in a Intel PXA270 based system. The serial interface is used for dynamic voltage scaling of the core voltage, masking interrupts, or for dis/enabling and setting the LDO output voltages. The interface is compatible with the Fast/Standard mode I2C™ specification, allowing transfers at up to 400 kHz.

The TPS65020 incorporates a push button debounced input and latched output for implementation of a push-button turn-on feature, typically required in smartphones or wireless PDAs.

产品特性

  • 1.2 A, 97% Efficient Step-Down Converter for System Voltage (VDCDC1)
  • 1 A, Up to 95% Efficient Step-Down Converter for Memory Voltage (VDCDC2)
  • 800 mA, 90% Efficient Step-Down Converter for Processor Core (VDCDC3)
  • 20 mA LDO/Switch for Real Time Clock (VRTC)
  • 2 × 200 mA LDO for SRAM and PLL
  • Dynamic Voltage Management for Processor Core
  • Externally Adjustable Reset Delay Time
  • Battery Backup Functionality
  • Separate Enable Pins for Inductive Converters
  • I2C Compatible Serial Interface
  • 85-µA Quiescent Current
  • Low Ripple PFM Mode
  • Thermal Shutdown Protection
  • Push Button I/O

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