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TSB81BA3E - 产品图解：
TSB81BA3E-IEEE P1394b 三端口电缆收发器/仲裁器
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TI产品 - TSB81BA3E介绍

TSB81BA3E - IEEE P1394b 三端口电缆收发器/仲裁器

TSB81BA3E是TI德州仪器公司的一款1394物理层控制器产品，TSB81BA3E是IEEE P1394b 三端口电缆收发器/仲裁器，本站介绍了TSB81BA3E的封装应用图解、特点和优点、功能等，并给出了与TSB81BA3E相关的TI元器件型号供参考。

TSB81BA3E - IEEE P1394b 三端口电缆收发器/仲裁器 - 1394物理层控制器 - 1394 - 德州仪器

产品特性
  • Fully Supports Provisions of IEEE P1394b Revision 1.33+ at 1-Gigabit Signaling Rates
  • Fully Supports Provisions of IEEE 1394a-2000 and 1394-1995 Standard for High Performance Serial Bus
  • Fully Interoperable With Firewire, i.LINK, and SB1394™, Implementation of IEEE Std 1394
  • Provides Three Fully Backward Compatible, (1394a-2000 Fully Compliant) Bilingual P1394b Cable Ports at up to 800 Megabits per Second (Mbits/s)
  • Provides Three 1394a-2000 Fully Compliant Cable Ports at 100/200/400 Mbits/s
  • Full 1394a-2000 Support Includes:
    • Connection Debounce
    • Arbitrated Short Reset
    • Multispeed Concatenation
    • Arbitration Acceleration
    • Fly-By Concatenation
    • Port Disable/Suspend/Resume
    • Extended Resume Signaling for Compatibility With Legacy DV Devices
  • Power-Down Features to Conserve Energy in Battery Powered Applications
  • Low-Power Sleep Mode
  • Fully Compliant With Open Host Controller Interface (HCI) Requirements
  • Cable Power Presence Monitoring
  • Cable Ports Monitor Line Conditions for Active Connection to Remote Node
  • Register Bits Give Software Control of Contender Bit, Power Class Bits, Link Active Control Bit, and 1394a-2000 Features
  • Data Interface to Link-Layer Controller Pin Selectable From 1394a-2000 Mode (2/4/8 Parallel Bits at 49.152 MHz) or 1394b Mode (8 Parallel Bits at 98.304 MHz)
  • Interface to Link-Layer Controller Supports Low Cost TI Bus-Holder Isolation
  • Interoperable With Link-Layer Controllers Using 3.3-V Supplies
  • Interoperable With Other 1394 Physical Layers (PHYs) Using 1.8-V, 3.3-V, and 5-V Supplies
  • Low Jitter, External Crystal Oscillator Provides Transmit and Receive Data at 100/200/400/800 Mbits/s, and Link-Layer Controller Clock at 49.152 MHz and 98.304MHz
  • Separate Bias (TPBIAS) for Each Port
  • Low Cost, High Performance 80-Pin TQFP (PFP) Thermally Enhanced Package and 168-Pin ZAJ (BGA) Package
  • Software Device Reset (SWR)
  • Fail-Safe Circuitry Senses Sudden Loss of Power to the Device and Disables the Ports to Ensure That the TSB81BA3E Does Not Load the TPBIAS of Any Connected Device and Blocks any Leakage From the Port Back to Power Plane
  • The TSB81BA3E Has a 1394a-2000 Compliant Common-Mode Noise Filter on the Incoming Bias Detect Circuit to Filter Out Cross-Talk Noise
  • The TSB81BA3E Is Port Programmable to Force 1394a Mode to Allow Use of 1394a Connectors (1394b Signaling Must Not Be Put Across 1394a Connectors or Cables)
  • Internal Voltage Regulator Option
2 Description

The TSB81BA3E provides the digital and analog transceiver functions needed to implement a three-port node in a cable-based IEEE 1394 network. Each cable port incorporates two differential line transceivers. The transceivers include circuitry to monitor the line conditions as needed for determining connection status, for initialization and arbitration, and for packet reception and transmission. The TSB81BA3E is designed to interface with a link-layer controller (LLC), such as the TSB82AA2, TSB12LV21, TSB12LV26, TSB12LV32, TSB42AA4, TSB42AB4, TSB12LV01B, or TSB12LV01C. It also may be connected cable port to cable port to an integrated 1394 Link + PHY layer such as the TSB43AB2.

产品器件信息
PART NUMBERPACKAGEBODY SIZE (NOM)
TSB81BA3EHTQFP (80)12.00 mm x 12.00 mm
NFBGA (167)12.00 mm x 12.00 mm
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