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74AC16373 - 产品图解:
74AC16373-具有三态输出的 16 位透明 D 类锁存器
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TI产品 - 74AC16373介绍
74AC16373 - 具有三态输出的 16 位透明 D 类锁存器

74AC16373是TI公司的一款D类锁存器产品,74AC16373是具有三态输出的 16 位透明 D 类锁存器,本页介绍了74AC16373的产品说明、应用、特性等,并给出了与74AC16373相关的TI元器件型号供参考。

74AC16373 - 具有三态输出的 16 位透明 D 类锁存器 - D类锁存器 - 触发器/锁存器/寄存器 - TI公司(Texas Instruments,德州仪器)

产品描述

The 'AC16373 are 16-bit transparent D-type latches with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The device can be used as two 8-bit latches or one 16-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.

A buffered output-enable input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The 74AC16373 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54AC16373 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74AC16373 is characterized for operation from -40°C to 85°C.

产品特性

  • Members of the Texas Instruments WidebusTM Family
  • 3-State True Outputs
  • Full Parallel Access for Loading
  • Flow-Through Architecture Optimizes PCB Layout
  • Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
  • EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

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