74ACT16841 - 具有三态输出的 20 位总线接口 D 类锁存器

74ACT16841是TI德州仪器公司的一款D类锁存器产品，74ACT16841是具有三态输出的 20 位总线接口 D 类锁存器，本站介绍了74ACT16841的封装应用图解、特点和优点、功能等，并给出了与74ACT16841相关的TI元器件型号供参考。

74ACT16841 - 具有三态输出的 20 位总线接口 D 类锁存器 - D类锁存器 - 触发器/锁存器/寄存器 - 德州仪器

产品描述

These 20-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The 'ACT16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

A buffered output-enable (1 or 2) input can be used to place the outputs of the corresponding 10-bit latch in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.

does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The 74ACT16841 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54ACT16841 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16841 is characterized for operation from -40°C to 85°C.

产品特性

Members of the Texas Instruments WidebusTM Family
Inputs Are TTL-Voltage Compatible
3-State Outputs Drive Bus Lines Directly
Provide Extra Bus Driving/Latches Necessary for Wider Address/Data Paths or Buses With Parity
Flow-Through Architecture Optimizes PCB Layout
Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Thin Shrink Small-Outline (DGG) Packages, 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

下面可能是您感兴趣的TI德州仪器公司D类锁存器元器件

TI公司产品现货专家，订购TI公司产品不限最低起订量，TI芯片大陆现货即时发货，香港库存3-5天发货，海外库存7-10天发货

寻找全球TI代理商现货货源 - TI公司（德州仪器）电子元件在线订购