ADC12C080 - 12 位、65/80 MSPS A/D 转换器

ADC12C080是TI德州仪器公司的一款高速ADC(>10MSPS)产品，ADC12C080是12 位、65/80 MSPS A/D 转换器，本站介绍了ADC12C080的封装应用图解、特点和优点、功能等，并给出了与ADC12C080相关的TI元器件型号供参考。

ADC12C080 - 12 位、65/80 MSPS A/D 转换器 - 高速ADC(>10MSPS) - 模数转换器 - 德州仪器

产品描述

The ADC12C080 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at rates up to 80 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC12C080 may be operated from a single +3.0V power supply and consumes low power. A separate +2.5V supply may be used for the digital output interface which allows lower power operation with reduced noise. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC12C080 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are pin-selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles.

The ADC12C080 is available in a 32-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.

产品特性

1 GHz Full Power Bandwidth
Internal Reference and Sample-and-Hold Circuit
Low Power Consumption
Data Ready Output Clock
Clock Duty Cycle Stabilizer
Single +3.0V Supply Operation
Power-Down Mode
32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

Key Specifications

Resolution 12 Bits
Conversion Rate 80 MSPS
SNR (fIN = 170 MHz) 68 dBFS (typ)
SFDR (fIN = 170 MHz) 86 dBFS (typ)
Full Power Bandwidth 1 GHz (typ)
Power Consumption 300 mW (typ)

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