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ADC12D1800RF - 产品图解:
ADC12D1800RF-12 位、1.8/3.6 GSPS 射频采样 ADC
ADC12D1800RF-高速模数转换器(>=1GSPS)-模数转换器-数据转换器
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TI产品 - ADC12D1800RF介绍
ADC12D1800RF - 12 位、1.8/3.6 GSPS 射频采样 ADC

ADC12D1800RF是TI公司的一款高速模数转换器(>=1GSPS)产品,ADC12D1800RF是12 位、1.8/3.6 GSPS 射频采样 ADC,本页介绍了ADC12D1800RF的产品说明、应用、特性等,并给出了与ADC12D1800RF相关的TI元器件型号供参考。

ADC12D1800RF - 12 位、1.8/3.6 GSPS 射频采样 ADC - 高速模数转换器(>=1GSPS) - 模数转换器 - TI公司(Texas Instruments,德州仪器)

1 Device Overview
1.1 Features
  • Excellent Noise and Linearity Up to and Above fIN = 2.7 GHz
  • Configurable to Either 3.6 GSPS Interleaved or 1800 MSPS Dual ADC
  • New DESCLKIQ Mode for High Bandwidth, High Sampling Rate Apps
  • Pin-Compatible with ADC1xD1x00, ADC12Dx00RF
  • AutoSync Feature for Multi-Chip Synchronization
  • Internally Terminated, Buffered, Differential Analog Inputs
  • Interleaved Timing Automatic and Manual Skew Adjust
  • Test Patterns at Output for System Debug
  • Time Stamp Feature to Capture External Trigger
  • Programmable Gain, Offset, and tAD Adjust
  • 1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs
  • Key Specifications
    • Resolution: 12 Bits
    • Interleaved 3.6 GSPS ADC (all typical)
      • IMD3 (Fin = 2.7GHz at -13dBFS) –62 dBc
      • IMD3 (Fin = 2.7GHz at -16dBFS) –64 dBc
      • Noise Floor Density -155.0 dBm/Hz
      • Power 4.29 W
    • Dual 1800 MSPS ADC, Fin = 498 MHz
      • ENOB 9.3 Bits (typ)
      • SNR 58.1 dB (typ)
      • SFDR 71.7 dBc (typ)
      • Power per Channel 2.15 W (typ)
1.2 Applications
  • 3G/4G Wireless Basestation
    • Receive Path
    • DPD Path
  • Wideband Microwave Backhaul
  • RF Sampling Software Defined Radio
  • Military Communications
  • SIGINT
  • RADAR / LIDAR
  • Wideband Communications
  • Consumer RF
  • Test and Measurement
1.3 Description

The 12-bit 1.8 GSPS ADC12D1800RF is an RF-sampling GSPS ADC that can directly sample input frequencies up to and above 2.7 GHz. The ADC12D1800RF augments the very large Nyquist zone of TI’s GSPS ADCs with excellent noise and linearity performance at RF frequencies, extending its usable range beyond the 3rd Nyquist zone.

The ADC12D1800RF provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage. The product is packaged in a lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to +85°C.

To achieve the full rated performance for Fclk > 1.6 GHz, it is necessary to write the max power settings once to Register 6h via the Serial Interface; see Section 5.6.1, Register Definitions, for more information.

产品器件信息
PART NUMBERPACKAGEBODY SIZE (NOM)
ADC12D1800RFBGA (292)27.00 mm x 27.00 mm
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