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ADC16V130 - 具有 LVDS 输出的 16 位、130 MSPS A/D 转换器
ADC16V130是TI德州仪器公司的一款高速ADC(>10MSPS)产品,ADC16V130是具有 LVDS 输出的 16 位、130 MSPS A/D 转换器,本站介绍了ADC16V130的封装应用图解、特点和优点、功能等,并给出了与ADC16V130相关的TI元器件型号供参考。
ADC16V130 - 具有 LVDS 输出的 16 位、130 MSPS A/D 转换器 - 高速ADC(>10MSPS) - 模数转换器 - 德州仪器
The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 130 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and external component count while providing excellent dynamic performance. Automatic power-up calibration enables excellent dynamic performance and reduces part-to-part variation, and the ADC16V130 could be re-calibrated at any time by asserting and then de-asserting power-down. An integrated low noise and stable voltage reference and differential reference buffer amplifier easies board level design. On-chip duty cycle stabilizer with low additive jitter allows wide duty cycle range of input clock without compromising its dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1.4 GHz. The digital data is provided via full data rate LVDS outputs – making possible the 64-pin, 9mm x 9mm WQFN package. The ADC16V130 operates on dual power supplies +1.8V and +3.0V with a power-down feature to reduce the power consumption to very low levels while allowing fast recovery to full operation.
- Dual Supplies: 1.8V and 3.0V Operation
- On Chip Automatic Calibration During Power-Up
- Low Power Consumption
- Multi-Level Multi-Function Pins for CLK/DF and PD
- Power-Down and Sleep Modes
- On Chip Precision Reference and Sample-and-Hold Circuit
- On Chip Low Jitter Duty-Cycle Stabilizer
- Offset Binary or 2's Complement Data Format
- Full Data Rate LVDS Output Port
- 64-pin WQFN Package (9x9x0.8, 0.5mm Pin-Pitch)
Key Specifications
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