CD4099B - CMOS 8 位可寻址锁存器

CD4099B是TI德州仪器公司的一款其它锁存器产品，CD4099B是CMOS 8 位可寻址锁存器，本站介绍了CD4099B的封装应用图解、特点和优点、功能等，并给出了与CD4099B相关的TI元器件型号供参考。

CD4099B - CMOS 8 位可寻址锁存器 - 其它锁存器 - 触发器/锁存器/寄存器 - 德州仪器

产品描述

CD4099B 8-bit addressable latch is a serial-input, parallel-output storage register that can perform a variety of functions.

Data are inputted to a particular bit in the latch when that bit is addressed (by means of input A0, A1, A2) and when WRITE DISABLE is at a low level. When WRITE DISABLE is high, data entry is inhibited; however, all 8 outputs can be continuously read independent of WRITE DISABLE and address inputs.

A master RESET input is available, which resets all bits to a logic "0" level when RESET and WRITE DISABLE are at a high level. When RESET is at a high level, and WRITE RESET is at a low level, the latch acts as a 1-of-8 demultiplexer; the bit that is addressed has an active output which follows the data input, while all unaddressed bits are held to a logic "0" level.

The CD4099B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline package (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

产品特性

Serial data input
Active parallel output
Storage register capability
Master clear
Can function as demultiplexer
Standardized, symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range) = 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
Applications:
- Multi-line decoders
- A/D converters

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