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CD54AC161 - 产品图解：
CD54AC161-具有异步复位的同步可预设的二进制计数器
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TI产品 - CD54AC161介绍

CD54AC161 - 具有异步复位的同步可预设的二进制计数器

CD54AC161是TI德州仪器公司的一款计数器/算术/奇偶校验功能产品，CD54AC161是具有异步复位的同步可预设的二进制计数器，本站介绍了CD54AC161的封装应用图解、特点和优点、功能等，并给出了与CD54AC161相关的TI元器件型号供参考。

CD54AC161 - 具有异步复位的同步可预设的二进制计数器 - 计数器/算术/奇偶校验功能 - 特殊逻辑 - 德州仪器

产品描述

The ’AC161 devices are 4-bit binary counters. These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting These devices are fully programmable; that is, they can be preset to any number between 0 and 9 or 15. Presetting is synchronous; therefore, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs.

The clear function is asynchronous. A low level at the clear (CLR)\ input sets all four of the flip-flop outputs low, regardless of the levels of the CLK, load (LOAD)\, or enable inputs.

The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are ENP, ENT, and a ripple-carry output (RCO). Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. Enabling RCO produces a high-level pulse while the count is maximum (9 or 15 with QA high). This high-level overflow ripple-carry pulse can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the level of CLK.

The counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD\) that modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times.

产品特性

  • Internal Look-Ahead for Fast Counting
  • Carry Output for n-Bit Cascading
  • Synchronous Counting
  • Synchronously Programmable
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection per MIL-STD-883, Method 3015

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