CD74HC138-Q1 - 汽车类高速 CMOS 逻辑 3 至 8 线路解码器多路解复用器（反向和非反向）

CD74HC138-Q1是TI德州仪器公司的一款解码器/编码器/多路复用器产品，CD74HC138-Q1是汽车类高速 CMOS 逻辑 3 至 8 线路解码器多路解复用器（反向和非反向），本站介绍了CD74HC138-Q1的封装应用图解、特点和优点、功能等，并给出了与CD74HC138-Q1相关的TI元器件型号供参考。

CD74HC138-Q1 - 汽车类高速 CMOS 逻辑 3 至 8 线路解码器多路解复用器（反向和非反向） - 解码器/编码器/多路复用器 - 特殊逻辑 - 德州仪器

产品描述

The CD74HC138 is a high-speed silicon-gate CMOS decoder well suited to memory address decoding or data routing applications. This circuit features low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky TTL logic. The circuit has three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC138 will go low.

Two active-low and one active-high enables (E1, E2, and E3) are provided to ease the cascading of decoders. The decoder’s eight outputs can drive ten low-power Schottky TTL equivalent loads.

产品特性

Qualified for Automotive Applications
Select One of Eight Data Outputs Active Low
I/O Port or Memory Selector
Three Enable Inputs to Simplify Cascading
Typical Propagation Delay of 13 ns at VCC = 5 V, CL = 15 pF, TA = 25°C
Fanout (Over Temperature Range)
- Standard Outputs . . . 10 LSTTL Loads
- Bus Driver Outputs . . . 15 LSTTL Loads
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
2-V to 6-V VCC Operation
High Noise Immunity; NIL or NIH = 30% of VCC, VCC = 5 V

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