DS90UR906Q-Q1是TI公司的一款FPD-LinkII串行器/解串器产品，DS90UR906Q-Q1是5-65MHz 24 位色彩 FPD 链接 II 解串器，本页介绍了DS90UR906Q-Q1的产品说明、应用、特性等，并给出了与DS90UR906Q-Q1相关的TI元器件型号供参考。
DS90UR906Q-Q1 - 5-65MHz 24 位色彩 FPD 链接 II 解串器 - FPD-LinkII串行器/解串器 - 显示和成像串行器/解串器 - TI公司（Texas Instruments，德州仪器）
- 5- to 65-MHz PCLK Support (140 Mbps to 1.82 Gbps)
- AC-Coupled STP Interconnect Cable up to 10 Meters
- Integrated Terminations on Serializer and Deserializer
- At Speed Link BIST Mode and Reporting Pin
- Optional I2C-Compatible Serial Control Bus
- RGB888 + VS, HS, DE Support
- Power Down Mode Minimizes Power Dissipation
- 1.8-V or 3.3-V Compatible LVCMOS I/O Interface
- Automotive-Grade Product: AEC-Q100 Grade 2 Qualified
- >8-kV HBM and ISO 10605 ESD Rating
- Backward Compatible Mode for Operation With Older Generation Devices
- SERIALIZER — DS90UR905Q-Q1
- RGB888 + VS/HS/DE Serialized to 1 Pair FPD-Link II
- Randomizer/Scrambler — DC-Balanced Data Stream
- Selectable Output VOD and Adjustable De-Emphasis
- DESERIALIZER — DS90UR906Q-Q1
- FAST Random Data Lock; No Reference Clock Required
- Adjustable Input Receiver Equalization
- LOCK (Real Time Link Status) Reporting Pin
- EMI Minimization on Output Parallel Bus (SSCG)
- Output Slew Control (OS)
- Automotive Display for Navigation
- Automotive Display for Entertainment
The DS90UR90xQ-Q1 chipset translates a parallel RGB video interface into a high-speed serialized interface over a single pair. This serial bus scheme makes system design easy by eliminating skew problems between clock and data, reducing the number of connector pins, reducing the interconnect size, weight, cost, and easing overall PCB layout. In addition, internal DC-balanced decoding is used to support AC-coupled interconnects.
The DS90UR905Q-Q1 serializer embeds the clock, balances the data payload, and level shifts the signals to high-speed, low voltage differential signaling. Up to 24 inputs are serialized, along with the three video control signals. This supports full 24-bit color or 18-bit color and 6 general-purpose signals (for example, Audio I2S applications).
The DS90UR906Q-Q1 deserializer recovers the data (RGB) and control signals and extracts the clock from the serial stream. The DS90UR906Q-Q1 is able to lock to the incoming data stream without the use of a training sequence or special SYNC patterns and does not require a reference clock. A link status (LOCK) output signal is provided.
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| DS90UR905Q-Q1 | WQFN (48) | 7.00 mm × 7.00 mm |
| DS90UR906Q-Q1 | WQFN (60) | 9.00 mm × 9.00 mm |
