DS91M040 - 125 MHz 四路 M-LVDS 收发器

DS91M040是TI德州仪器公司的一款多点LVDS(MLVDS/BLVDS/LVDM)产品，DS91M040是125 MHz 四路 M-LVDS 收发器，本站介绍了DS91M040的封装应用图解、特点和优点、功能等，并给出了与DS91M040相关的TI元器件型号供参考。

DS91M040 - 125 MHz 四路 M-LVDS 收发器 - 多点LVDS(MLVDS/BLVDS/LVDM) - LVDS/M-LVDS/ECL/CML - 德州仪器

产品描述

The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks.

M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs. M-LVDS devices also have a very large input common mode voltage range for additional noise margin in heavily loaded and noisy backplane environments.

A single DS91M040 channel is a half-duplex transceiver that accepts LVTTL/LVCMOS signals at the driver inputs and converts them to differential M-LVDS signal levels. The receiver inputs accept low voltage differential signals (LVDS, BLVDS, M-LVDS, LVPECL and CML) and convert them to 3V LVCMOS signals. The DS91M040 supports both M-LVDS type 1 and type 2 receiver inputs.

产品特性

DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
Wide Input Common Mode Voltage Range Allows up to ±1V of GND Noise
Conforms to TIA/EIA-899 M-LVDS Standard
Pin Selectable M-LVDS Receiver Type (1 or 2)
Controlled Transition Times (2.0 ns typ) Minimize Reflections
8 kV ESD on M-LVDS I/O pins protects adjoining components
Flow-Through Pinout Simplifies PCB Layout
Small 5 mm x 5 mm WQFN-32 Space Saving Package

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