• Ultra Low Noise, High Performance
  • Jitter: 100 fs RMS typical, Fout > 100 MHz
  • PSRR: -70 dBc, robust supply noise immunity
• Flexible Device Options
  • Up to 8 AC-LVPECL, AC-LVDS, AC-CML, HCSL or LVCMOS outputs or any combination
  • Pin mode, I2C mode, EEPROM mode
  • 71 pin selectable pre-programmed default startup options
• Dual Inputs with automatic or manual selection
  • Crystal input: 10 to 52 MHz
  • External input: 1 to 300 MHz
• Frequency Margining Options
  • Fine frequency margining (±50 ppm typ) using low-cost pullable crystal reference
  • Glitchless coarse frequency margining (%) using output dividers
• Other Features
  • Supply: 3.3-V core, 1.8/2.5/3.3-V output supply
  • Industrial temperature range (-40ºC to +85ºC)
  • Package: 7 mm x 7 mm 48-QFN

• Switches & Routers
• Network & Telecom Line Cards
• Servers & Storage Systems
• Wireless Base Station

The LMK03328 is an ultra-low-noise clock generator with two fractional-N frequency synthesizers with integrated VCOs, flexible clock distribution/fanout, and pin-selectable configuration states stored in on-chip EEPROM. The device can generate multiple clocks for various multi-gigabit serial interfaces and digital devices, reduces BOM cost and board area, and improves reliability by replacing multiple oscillators and clock distribution devices. The ultra-low-jitter reduces bit error rate (BER) in high-speed serial links.