LMK04828 - 超低抖动合成器和抖动消除器

LMK04828是TI德州仪器公司的一款双/级联PLL产品，LMK04828是超低抖动合成器和抖动消除器，本站介绍了LMK04828的封装应用图解、特点和优点、功能等，并给出了与LMK04828相关的TI元器件型号供参考。

LMK04828 - 超低抖动合成器和抖动消除器 - 双/级联PLL - 时钟抖动消除器 - 德州仪器

产品特性

JEDEC JESD204B Support
Ultra-Low RMS Jitter
- 88 fs RMS Jitter (12 kHz to 20 MHz)
- 91 fs RMS Jitter (100 Hz to 20 MHz)
- –162.5 dBc/Hz Noise Floor at 245.76 MHz
Up to 14 Differential Device Clocks from PLL2
- Up to 7 SYSREF Clocks
- Maximum Clock Output Frequency 3.1 GHz
- LVPECL, LVDS, HSDS, LCPECL Programmable Outputs from PLL2
Up to 1 Buffered VCXO/Crystal Output from PLL1
- LVPECL, LVDS, 2xLVCMOS Programmable
Dual Loop PLLatinum™ PLL Architecture
PLL1
- Up to 3 Redundant Input Clocks
  - Automatic and Manual Switch-Over Modes
  - Hitless Switching and LOS
- Integrated Low-Noise Crystal Oscillator Circuit
- Holdover mode when Input Clocks are Lost
PLL2
- Normalized [1 Hz] PLL Noise Floor of -227 dBc/Hz
- Phase Detector Rate up to 155 MHz
- OSCin Frequency-Doubler
- Two Integrated Low-Noise VCOs
50% Duty Cycle Output Divides, 1 to 32 (even and odd)
Precision Digital Delay, Dynamically Adjustable
25 ps Step Analog Delay
Multi-mode: Dual PLL, single PLL, and Clock Distribution
Industrial Temperature Range: –40 to 85°C
Supports 105°C PCB Temperature (Measured at Thermal Pad)
3.15-V to 3.45-V Operation
Package: 64-pin QFN (9.0 x 9.0 x 0.8 mm)

产品应用

Wireless Infrastructure
Data Converter Clocking
Networking, SONET/SDH, DSLAM
Medical / Video / Military / Aerospace
Test and Measurement

产品说明

The LMK0482x family is the industry's highest performance clock conditioner with JEDEC JESD204B support.

The 14 clock outputs from PLL2 can be configured to drive seven JESD204B converters or other logic devices using device and SYSREF clocks. SYSREF can be provided using both DC and AC coupling. Not limited to JESD204B applications, each of the 14 outputs can be individually configured as high performance outputs for traditional clocking systems.

The high performance combined with features like the ability to trade off between power or performance, dual VCOs, dynamic digital delay, holdover, and glitchless analog delay make the LMK0482x family ideal for providing flexible high performance clocking trees.

产品器件信息

PART NUMBER	VCO0 FREQUENCY	VCO1 FREQUENCY
LMK04821	1930 to 2075 MHz	2920 to 3080 MHz VCO1 Div = ÷2 to ÷8 (÷2 = 1460 to 1540 MHz)
LMK04826B	1840 to 1970 MHz	2440 to 2505 MHz
LMK04828B	2370 to 2630 MHz	2920 to 3080 MHz

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