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RM57L843 - 产品图解:
RM57L843-RM57L843 16 位和 32 位 RISC 闪存微控制器 (INT)
RM57L843-安全-高性能MCU-微控制器(MCU)
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TI产品 - RM57L843介绍
RM57L843 - RM57L843 16 位和 32 位 RISC 闪存微控制器 (INT)

RM57L843是TI公司的一款安全产品,RM57L843是RM57L843 16 位和 32 位 RISC 闪存微控制器 (INT),本页介绍了RM57L843的产品说明、应用、特性等,并给出了与RM57L843相关的TI元器件型号供参考。

RM57L843 - RM57L843 16 位和 32 位 RISC 闪存微控制器 (INT) - 安全 - 高性能MCU - TI公司(Texas Instruments,德州仪器)

1 Device Overview
1.1 Features
  • High-Performance Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs with ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU and On-Chip RAMs
    • Error Signaling Module (ESM) with Error Pin
    • Voltage and Clock Monitoring
  • ARM® Cortex® - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz with 8-Stage Pipeline
    • FPU with Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32 KB Instruction and 32 KB Data Caches with ECC
    • Open Architecture with Third-Party Support
  • Operating Conditions
    • Up to 330-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash with ECC
    • 512KB of RAM with ECC
    • 128KB of Data Flash for Emulated EEPROM with ECC
  • 16-Bit External Memory Interface (EMIF)
  • HERCULES™ Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Module (VIM) with ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 32 Control Packets
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) with Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight™ Components
  • Advanced JTAG Security Module (AJSM)
  • Trace and Calibration Capabilities
    • ETM™, RTP, DMM , POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each with ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words with ECC Protection
      • Other MibSPIs: 128 Words with ECC Protection
    • Four UART (SCI) Interfaces, Two with Local Interconnect Network (LIN 2.1) Interface Support
  • Two High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM with Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 10- and 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each with Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
    • ±2°C Accuracy
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins with External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (ZWT) [Green]
1.2 Applications
  • Industrial Safety Applications
    • Industrial Automation
    • Safe Programmable Logic Controllers (PLCs)
    • Power Generation and Distribution
    • Turbines and Windmills
    • Elevators and Escalators
  • Medical Applications
    • Ventilators
    • Defibrillators
    • Infusion and Insulin Pumps
    • Radiation Therapy
    • Robotic Surgery
1.3 Description

The RM57L843 device is a high-performance microcontroller family for safety systems. The device has Built-In Self Test (BIST) logic for the CPU, the N2HET coprocessors, and for on-chip SRAMs. The device supports ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The RM57L843 device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66DMIPS/MHz, and can run up to 330 MHz providing up to 547 DMIPS. The device supports the little-endian [LE] format.

The RM57L843 device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The RM57L843 device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support;four CANs; two I2C modules; and one Ethernet controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 Kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 32 control packets, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the RM57L843 device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

产品器件信息
PART NUMBER PACKAGEBODY SIZE
RM57L843ZWTNFBGA (337)16.00 mm x 16.00 mm
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