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- DP83620SQX/NOPB - 集成电路(IC) > 接口 > 驱动器,接收器,收发器
- TLV27L1IDBVR - 集成电路(IC) > 线性 > 放大器 > 仪器,运算放大器,缓冲器
- TLC555QDRQ1 - 集成电路(IC) > 时钟/定时 > 可编程定时器和振荡器
- TPS92550TZX/NOPB - 集成电路(IC) > 电源管理(PMIC) > LED 驱动器
- LP8340IDT-1.8/NOPB - 电源管理IC - 稳压器 - 线性
- SN74CBT3245AZQNR - 集成电路(IC) > 逻辑 > 信号开关,多路复用器,解码器
- LMP8640HV-HEVAL/NOPB - 开发板,套件,编程器 > 评估板 > 运算放大器评估板
- ADS7822PG4 - 集成电路(IC) > 数据采集 > 模数转换器(ADC)
- TPS61232DRCR - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - DC-DC 开关稳压器
- LMK3H0102T17RGTRQ1 - 集成电路(IC) > 时钟/定时 > 时钟发生器,PLL,频率合成器
- SN74LVC1G11DBVR - 集成电路(IC) > 逻辑 > 门和反相器
- VSP10T21PFBG4 - 数据采集 - 模拟前端(AFE)
- LP2985AIBPX-2.8/NOPB - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - 线性
- OPA202IDGKR - 集成电路(IC) > 线性 > 放大器 > 仪器,运算放大器,缓冲器
- LM34910SDX - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - DC-DC 开关稳压器
- LM20146MHE/NOPB - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - DC-DC 开关稳压器
- ADS7825PG4 - 集成电路(IC) > 数据采集 > 模数转换器(ADC)
- DRV10963JMDSNR - 集成电路(IC) > 电源管理(PMIC) > 电机驱动器,控制器
- TPS60200DGSR - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - DC-DC 开关稳压器



SCANSTA111 - SCANSTA111 增强型 SCAN 桥接器多点可寻址 IEEE 1149.1 (JTAG) 端口
SCANSTA111是TI德州仪器公司的一款边界扫描(JTAG)接口产品,SCANSTA111是SCANSTA111 增强型 SCAN 桥接器多点可寻址 IEEE 1149.1 (JTAG) 端口,本站介绍了SCANSTA111的封装应用图解、特点和优点、功能等,并给出了与SCANSTA111相关的TI元器件型号供参考。
SCANSTA111 - SCANSTA111 增强型 SCAN 桥接器多点可寻址 IEEE 1149.1 (JTAG) 端口 - 边界扫描(JTAG)接口 - 其它接口 - 德州仪器
The SCANSTA111 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANSTA111 supports up to 3 local IEEE 1149.1 scan rings which can be accessed individually or combined serially. Addressing is accomplished by loading the instruction register with a value matching that of the Slot inputs. Backplane and inter-board testing can easily be accomplished by parking the local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit TCK counter enables built in self test operations to be performed on one port while other scan chains are simultaneously tested.
- True IEEE 1149.1 Hierarchical and Multidrop Addressable Capability
- The 7 Slot Inputs Support Up to 121 Unique Addresses, an Interrogation Address, Broadcast Address, and 4 Multi-Cast Group Addresses (Address 000000 is Reserved)
- 3 IEEE 1149.1-Compatible Configurable Local Scan Ports
- Mode Register0 Allows Local TAPs to be Bypassed, Selected for Insertion Into the Scan Chain Individually, or Serially in Groups of Two or Three
- Transparent Mode can be Enabled with a Single Instruction to Conveniently Buffer the Backplane IEEE 1149.1 Pins to those on a Single Local Scan Port
- LSP ACTIVE Outputs Provide Local Port Enable Signals for Analog Busses Supporting IEEE 1149.4.
- General Purpose Local Port Pass-Through Bits are Useful for Delivering Write Pulses for FPGA Programming or Monitoring Device Status.
- Known Power-Up State
- TRST on All Local Scan Ports
- 32-Bit TCK Counter
- 16-Bit LFSR Signature Compactor
- Local TAPs can become TRI-STATE via the OE Input to Allow an Alternate Test Master to Take Control of the Local TAPs (LSP0-2 Have a TRI-STATE Notification Output)
- 3.0-3.6V VCC Supply Operation
- Power-Off High Impedance Inputs and Outputs
- Supports Live Insertion/Withdrawal
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