SN54HC139-SP是TI公司的一款解码器/编码器/多路复用器产品，SN54HC139-SP是双路 2 线路至 4 线路解码器/多路解复用器，本页介绍了SN54HC139-SP的产品说明、应用、特性等，并给出了与SN54HC139-SP相关的TI元器件型号供参考。
SN54HC139-SP - 双路 2 线路至 4 线路解码器/多路解复用器 - 解码器/编码器/多路复用器 - 特殊逻辑 - TI公司（Texas Instruments，德州仪器）
The ’HC139 devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay time of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
The ’HC139 devices comprise two individual 2-line to 4-line decoders in a single package. The active-low enable (G\) input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit.
- Targeted Specifically for High-Speed Memory Decoders and Data-Transmission Systems
- Wide Operating Voltage Range of 2 V to 6 V
- Outputs Can Drive Up To 10 LSTTL Loads
- Low Power Consumption, 80-µA Max ICC
- Typical tpd = 10 ns
- ±4-mA Output Drive at 5 V
- Low Input Current of 1 µA Max
- Incorporate Two Enable Inputs to Simplify Cascading and/or Data Reception
