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SN54HC193 - 产品图解:
SN54HC193-具有双时钟和清零功能的同步 4 位加/减二进制计数器
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TI产品 - SN54HC193介绍
SN54HC193 - 具有双时钟和清零功能的同步 4 位加/减二进制计数器

SN54HC193是TI公司的一款计数器/算术/奇偶校验功能产品,SN54HC193是具有双时钟和清零功能的同步 4 位加/减二进制计数器,本页介绍了SN54HC193的产品说明、应用、特性等,并给出了与SN54HC193相关的TI元器件型号供参考。

SN54HC193 - 具有双时钟和清零功能的同步 4 位加/减二进制计数器 - 计数器/算术/奇偶校验功能 - 特殊逻辑 - TI公司(Texas Instruments,德州仪器)

产品描述

The ’HC193 devices are 4-bit synchronous, reversible, up/down binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters.

The outputs of the four flip-flops are triggered on a low-to-high-level transition of either count (clock) input (UP or DOWN). The direction of counting is determined by which count input is pulsed while the other count input is high.

All four counters are fully programmable; that is, each output may be preset to either level by placing a low on the load (LOAD)\ input and entering the desired data at the data inputs. The output changes to agree with the data inputs independently of the count pulses. This feature allows the counters to be used as modulo-N dividers simply by modifying the count length with the preset inputs.

A clear (CLR) input has been provided that forces all outputs to the low level when a high level is applied. The clear function is independent of the count and LOAD\ inputs.

These counters were designed to be cascaded without the need for external circuitry. The borrow (BO)\ output produces a low-level pulse while the count is zero (all outputs low) and DOWN is low. Similarly, the carry (CO)\ output produces a low-level pulse while the count is maximum (9 or 15), and UP is low. The counters then can be cascaded easily by feeding BO\ and CO\ to DOWN and UP, respectively, of the succeeding counter.

产品特性

  • Wide Operating Voltage Range of 2 V to 6 V
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 20 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Look-Ahead Circuitry Enhances Cascaded Counters
  • Fully Synchronous in Count Modes
  • Parallel Asynchronous Load for Modulo-N Count Lengths
  • Asynchronous Clear

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