SN65LVDS180 - 单路全双工 LVDS 收发器

SN65LVDS180是TI德州仪器公司的一款LVDSPHY(<800Mbps)产品，SN65LVDS180是单路全双工 LVDS 收发器，本站介绍了SN65LVDS180的封装应用图解、特点和优点、功能等，并给出了与SN65LVDS180相关的TI元器件型号供参考。

SN65LVDS180 - 单路全双工 LVDS 收发器 - LVDSPHY(<800Mbps) - LVDS/M-LVDS/ECL/CML - 德州仪器

产品特性

Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard
Full-Duplex Signaling Rates up to 150 Mbps (See Table 1)
Bus-Pin ESD Exceeds 12 kV
Operates From a Single 3.3-V Supply
Low-Voltage Differential Signaling With Typical Output Voltages of 350 mV and a 100-Ω Load
Propagation Delay Times
- Driver: 1.7 ns Typical
- Receiver: 3.7 ns Typical
Power Dissipation at 200 MHz
- Driver: 25 mW Typical
- Receiver: 60 mW Typical
LVTTL Input Levels Are 5-V Tolerant
Receiver Maintains High Input Impedance With VCC < 1.5 V
Receiver Has Open-Circuit Fail Safe

产品应用

Wireless Infrastructure
Telecom Infrastructure
Printer

产品说明

The SN65LVDS179, SN65LVDS180, SN65LVDS050, and SN65LVDS051 devices are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps (see Table 1). The TIA/EIA-644 standard-compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100-Ω load and receipt of 100-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.

产品器件信息

PART NUMBER	PACKAGE	BODY SIZE (NOM)
SN65LVDS179	SOIC (8)	4.90 mm × 3.91 mm
SN65LVDS179	VSSOP (8)	3.00 mm × 3.00 mm
SN65LVDS180	SOIC (14)	8.65 mm × 3.91 mm
SN65LVDS180	TSSOP (14)	5.00 mm × 4.40 mm
SN65LVDS050	SOIC (16)	9.90 mm × 3.91 mm
SN65LVDS050	TSSOP (16)	5.00 mm × 4.40 mm
SN65LVDS051	SOIC (16)	9.90 mm × 3.91 mm
SN65LVDS051	TSSOP (16)	5.00 mm × 4.40 mm

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