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SN74ALS232B - 16 x 4 异步 FIFO 存储器
SN74ALS232B是TI德州仪器公司的一款FIFO寄存器产品,SN74ALS232B是16 x 4 异步 FIFO 存储器,本站介绍了SN74ALS232B的封装应用图解、特点和优点、功能等,并给出了与SN74ALS232B相关的TI元器件型号供参考。
SN74ALS232B - 16 x 4 异步 FIFO 存储器 - FIFO寄存器 - 触发器/锁存器/寄存器 - 德州仪器
This 64-bit memory features high speed and fast fall-through times. It is organized as 16 words by 4 bits.
A first-in, first-out (FIFO) memory is a storage device that allows data to be written into and read from its array at independent data rates. This FIFO is designed to process data at rates up to 40MHz in a bit-parallel format, word by word.
Data is written into memory on a low-to-high transition at the load-clock (LDCK) input and is read out on a low-to-high transition at the unload-clock (UNCK) input. The memory is full when the number of words clocked in exceeds by 16 the number of words clocked out. When the memory is full, LDCK signals have no effect on the data residing in memory. When the memory is empty, UNCK signals have no effect.
Status of the FIFO memory is monitored by the FULL\ and EMPTY\ output flags. The FULL\ output is low when the memory is full and high when it is not full. The EMPTY\ output is low when the memory is empty and high when it is not empty.
A low level on the reset (RST\) input resets the internal stack-control pointers and also sets EMPTY\ low and sets FULL\ high. The Q outputs are not reset to any specific logic level. The first low-to-high transition on LDCK, after either a RST\ pulse or from an empty condition, causes EMPTY\ to go high and the data to appear on the Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs are noninverting with respect to the data inputs and are at high impedance when the output-enable (OE) input is low. OE does not affect the FULL\ or EMPTY\ output flags. Cascading is easily accomplished in the word-width direction but is not possible in the word-depth direction.
The SN74ALS232B is characterized for operation from 0°C to 70°C.
- Independent Asynchronous Inputs and Outputs
- 16 Words by 4 Bits
- Data Rates up to 40 MHz
- Fall-Through Time 14 ns Typical
- 3-State Outputs
- Package Options Include Plastic Small-Outline Package (DW), Plastic Chip Carriers (FN), and Standard Plastic 300-mil DIPs (N)
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