SN74AUC1G125 - 具有三态输出的单路总线缓冲器闸

SN74AUC1G125是TI德州仪器公司的一款无产品，SN74AUC1G125是具有三态输出的单路总线缓冲器闸，本站介绍了SN74AUC1G125的封装应用图解、特点和优点、功能等，并给出了与SN74AUC1G125相关的TI元器件型号供参考。

SN74AUC1G125 - 具有三态输出的单路总线缓冲器闸 - 无 - 小尺寸逻辑器件 - 德州仪器

产品描述

产品特性

Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
Ioff Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max tpd of 2.5 ns at 1.8 V
Low Power Consumption, 10-µA Max ICC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

NanoFree is a trademark of Texas Instruments

DESCRIPTION/ORDERING INFORMATION

This bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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