SN74AUP1G17是TI公司的一款无产品，SN74AUP1G17是低功耗单路施密特触发缓冲器，本页介绍了SN74AUP1G17的产品说明、应用、特性等，并给出了与SN74AUP1G17相关的TI元器件型号供参考。
SN74AUP1G17 - 低功耗单路施密特触发缓冲器 - 无 - 小尺寸逻辑器件 - TI公司（Texas Instruments，德州仪器）
- Available in the Texas Instruments NanoStar™ Package
- Low Static-Power Consumption (ICC = 0.9 µA Max)
- Low Dynamic-Power Consumption (Cpd = 4.4 pF Typ at 3.3 V)
- Low Input Capacitance (Ci = 1.5 pF Typ)
- Low Noise – Overshoot and Undershoot <10% of VCC
- Ioff Supports Partial-Power-Down Mode Operation
- Includes Schmitt-Trigger Inputs
- Wide Operating VCC Range of 0.8 V to 3.6 V
- Optimized for 3.3-V Operation
- 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- tpd = 5.1 ns Max at 3.3 V
- Suitable for Point-to-Point Applications
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
NanoStar is a trademark of Texas Instruments.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life. This product also maintains excellent signal integrity (see Figure 1 and Figure 2).
This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
