SN74LV74A-Q1是TI公司的一款D类触发器产品，SN74LV74A-Q1是汽车类双路上升沿 D 类触发器，本页介绍了SN74LV74A-Q1的产品说明、应用、特性等，并给出了与SN74LV74A-Q1相关的TI元器件型号供参考。
SN74LV74A-Q1 - 汽车类双路上升沿 D 类触发器 - D类触发器 - 触发器/锁存器/寄存器 - TI公司（Texas Instruments，德州仪器）
- Qualified for Automotive Applications
- 2-V to 5.5-V VCC Operation
- Max tpd of 13 ns at 5 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
- Support Mixed-Mode Voltage Operation on All Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
description/ordering information
This dual positive-edge-triggered D-type flip-flop is designed for 2-V to 5.5-V VCC operation.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
