CD4556B - 输出可选低电压的 CMOS 双路二进制 4 选 1 解码器/多路解复用器

CD4556B是TI德州仪器公司的一款解码器/编码器/多路复用器产品，CD4556B是输出可选低电压的 CMOS 双路二进制 4 选 1 解码器/多路解复用器，本站介绍了CD4556B的封装应用图解、特点和优点、功能等，并给出了与CD4556B相关的TI元器件型号供参考。

CD4556B - 输出可选低电压的 CMOS 双路二进制 4 选 1 解码器/多路解复用器 - 解码器/编码器/多路复用器 - 特殊逻辑 - 德州仪器

产品描述

CD4555B and CD4556B are dual one-of-four decoders/demultiplexers. Each decoder has two select inputs (A and B), an Enable input (E\), and four mutually exclusive outputs. On the CD4555B the outputs are high on select; on the CD4556B the outputs are low on select.

When the enable input is high, the outputs of the CD4555B remain low and the outputs of the CD4556B remain high regardless of the state of the select inputs A and B. The CD4555B and CD4556B are similar to types MC14555 and MC14556, respectively.

The CD4555B and CD4556B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastics packages (E suffix), and 16-lead small-outline packages (M, M96, and MT suffixes). The CD4555B is also supplied in 16-lead small-outline packages (NSR suffix) and 16-lead thin shrink small-outline packages (PW and PWR suffixes.)

产品特性

Expandable with multiple packages
Standard, symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package temperature range; 100 na at 18 V and 25°C
Noise margin (full package-temperature range): 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
Applications:
- Decoding
- Code conversion
- Demultiplexing (using Enable input as a data input)
- Memory chip-enable selection
- Function selection

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